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參數(shù)資料
| 型號： | LZ85194 |
| 廠商： | Sharp Corporation |
| 英文描述： | IrDA Control Peripheral Engine(IrDA 控制外圍處理器) |
| 中文描述： | 紅外線控制周邊引擎（紅外線控制外圍處理器） |
| 文件頁數(shù)： | 12/76頁 |
| 文件大小： | 256K |
| 代理商： | LZ85194 |
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LZ85194
6
IrDA Control Peripheral Engine User
’
s Guide
Serial Interface
The PE and μP for control are connected by a Synchronous Serial Wire (SS-Wire) inter-
face. Table 1 describes a list of signal lines used in the SS-Wire interface.
Table 1. Signal Used in SS-Wire Interface
SIGNAL
I/O
DESCRIPTION
MSG
Output
MSG = H signal indicates that the PE holds a message. The μP should
issue the Get_Message command and read out the message. When no
message is held, the PE outputs MSG = L. Other commands except for
Get_Message should not be issued when MSG = H, while Get_Message
should not be issued when MSG = L.
Serial data input signal line. In issuing commands, each bit of the command
must be output by the μP, synchronizing with the falling edge of SCK.
SI = H for data
‘
1
’
, SI = L for data
‘
0
’
must be output.
Serial data output signal line. In case the commands call for a response
from the PE, the PE would output the response following the command
data. The μP must read in the contents of SO at the rising edge of SCK. PE
outputs SO = H for data
‘
1
’
, and SO = L for data
‘
0
’
.
Clock signal for serial data. The clock must be provided by the μP. Default
is SCK = H. When issuing commands or the PE is responding, SCK should
transition H
→
L
→
H. The PE should read in each bit of Command (SI) at
the rising edge of SCK. In response, the PE should output each bit of its
response (SO) at the falling edge of SCK.
SI
Input
SO
Output
SCK
Input
The clock function is stopped with the serial data byte order, indicating that
when the last bit of the current output (or input) via the serial data signal
lines is completed, SCK must be set at SCK = H.
The signal for flow control. Whenever the next byte can read/write through
the serial data signal lines, the PE will output RDY = H. The μP must
observe the state of RDY when the μP completes the last bit of the current
byte. In the event of RDY = L, it should make the SCK stop the Clock
(SCK = H fixed), and wait for the RDY to become RDY = H.
Timing signal for Command ID. The μP must configure CMD = H before
outputting D7 bit of Command ID to SI. Then, after outputting D0 bit of
Command ID, wait for RDY to become RDY = H, and set CMD = L.
RDY
Output
CMD
Input
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