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參數(shù)資料
| 型號： | LXT971ALE |
| 英文描述： | LAN TRANSCEIVER|SINGLE|CMOS|QFP|64PIN|PLASTIC |
| 中文描述： | 網(wǎng)絡(luò)收發(fā)器|單|的CMOS | QFP封裝| 64管腳|塑料 |
| 文件頁數(shù)： | 6/68頁 |
| 文件大小： | 1177K |
| 代理商： | LXT971ALE |
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LXT9784
—
Low-Power Octal PHY
6
Datasheet
Tables
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Signal Types .......................................................................................................11
Numeric Pad Assignments..................................................................................12
Network Interface Signal Descriptions ................................................................22
MDIO Signal Descriptions...................................................................................23
LED Signal Descriptions .....................................................................................23
Power Supply Signal Descriptions......................................................................24
Miscellaneous Signal Descriptions......................................................................25
RMII Mode Signal Descriptions...........................................................................26
SMII Mode Signal Descriptions...........................................................................27
Unused Pins........................................................................................................28
LXT9784 Modes of Operation.............................................................................30
SMII RXD_[7:0] Contents....................................................................................32
4B/5B Coding......................................................................................................34
Straight-through Pin Assignments.......................................................................39
Crossed-over Pin Assignments...........................................................................39
PHY Addresses...................................................................................................41
LED Functionality................................................................................................43
Activity LED Blink Rates......................................................................................43
MII Management Frame Format .........................................................................43
Glossary of Protocol Terms.................................................................................44
Test Mode Configuration.....................................................................................44
Test Scan Chain..................................................................................................45
Magnetics Module Vendor ..................................................................................48
Absolute Maximum Ratings ................................................................................51
Operating Conditions ..........................................................................................51
Clock DC Characteristics ....................................................................................52
RMII/SMII and General Interface1 DC Characteristics .......................................52
LED DC Characteristics ......................................................................................52
10BASE-T Receiver Voltage/Current DC Characteristics...................................52
10BASE-T Transmitter Voltage/Current DC Characteristics...............................53
100BASE-TX Receiver Voltage/Current DC Characteristics ..............................53
100BASE-TX Transmitter Voltage/Current DC Characteristics ..........................53
MII Management Clock Specifications................................................................54
MII Management Interface Timing Parameters...................................................55
10BASE-T Normal Link Pulse (NLP) Timing Parameters ...................................55
Auto-Negotiation Fast Link Pulse (FLP) Timing Parameters ..............................55
100BASE-TX Transmitter AC Specifications ......................................................56
RMII Interface Timing Parameters......................................................................57
SMII Interface Timing Parameters ......................................................................58
Reset Timing Parameters ...................................................................................58
MCLK Specifications...........................................................................................59
Bit Type Designations.........................................................................................60
Control Register (Register 0) Bit Definitions .......................................................60
Status Register (Register 1) Bit Definitions.........................................................61
PHY Identifier Register (Register 2) Bit Definitions.............................................62
PHY Identifier Register (Register 3) Bit Definitions.............................................62
Auto-Negotiation Advertisement Register (Register 4) Bit Definitions ................62
Auto-Negotiation Link Partner Ability Register (Base Page)
(Register 5) Bit Definitions ..................................................................................63
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