參數(shù)資料
型號(hào): LXT971ALE
英文描述: LAN TRANSCEIVER|SINGLE|CMOS|QFP|64PIN|PLASTIC
中文描述: 網(wǎng)絡(luò)收發(fā)器|單|的CMOS | QFP封裝| 64管腳|塑料
文件頁(yè)數(shù): 5/68頁(yè)
文件大小: 1177K
代理商: LXT971ALE
Datasheet
5
Low-Power Octal PHY
LXT9784
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LXT9784 Block Diagram .......................................................................................9
LXT9784 Ball Assignments - RMII Mode ............................................................10
LXT9784 Ball Assignments - SMII Mode.............................................................11
LXT9784 PHY in a 10/100 Mbps Ethernet Solution ............................................29
RMII Data Reception...........................................................................................32
False Carrier Detect............................................................................................32
SMII Received Serial Data Stream......................................................................33
NRZ to MLT-3 encoding diagram........................................................................34
RMII Data Transmission......................................................................................36
SMII Transmit Data Serial Stream.......................................................................36
Simplified Interrupt Structure...............................................................................42
Typical RBIAS Circuit..........................................................................................48
Typical RMII Application......................................................................................49
Typical SMII Application......................................................................................50
AC Testing Level Conditions...............................................................................54
MDC Clock AC Timing ........................................................................................54
MII Management Timing Parameters: MDC/MDIO .............................................54
Normal Link Pulse Timings..................................................................................55
Fast Link Pulse Timings......................................................................................55
RMII AC Testing Level Conditions ......................................................................56
RMII Rise and Fall Timings.................................................................................56
RMII Timing Parameters .....................................................................................57
SMII Mode - AC Testing Level Conditions ..........................................................57
SMII Timing Parameters......................................................................................58
Reset Timing Parameters....................................................................................58
Master Clock Specifications................................................................................59
Master Clock Slope Specifications......................................................................59
Package Specifications.......................................................................................68
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