參數(shù)資料
型號: LTC4268IDKD-1#PBF
廠商: Linear Technology
文件頁數(shù): 3/46頁
文件大?。?/td> 419K
描述: IC PD HIGH POWER W/CNTRL 32-DFN
產(chǎn)品培訓(xùn)模塊: Power over Ethernet
標(biāo)準(zhǔn)包裝: 52
類型: 以太網(wǎng)供電開關(guān)(PoE)
應(yīng)用: 遠(yuǎn)程外設(shè)(工業(yè)控制,相機(jī),數(shù)據(jù)訪問)
內(nèi)部開關(guān):
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-DFN(7x4)裸露焊盤
包裝: 管件
42681fc
LTC4268-1
3
elecTrical characTerisTics
 
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
 = 25癈. V
CC
 = 14V, SG open, V
CMP
 = 1.5V, V
SENSE
 = 0V, R
CMP
 = 1k, R
tON
 = 90k,
R
PGDLY
 = 27.4k, R
ENDLY
 = 90k, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
PORT
Supply Voltage
 
IEEE 802.3af System
    Signature Range
    Classification Range
    UVLO Turn-On Voltage
    UVLO Turn-Off Voltage
Voltage With Respect to V
PORTP
 Pin
(Notes 6, 7, 8, 9, 10)
 
 
l
l
l
l
l
 
 
 
1.5
12.5
37.7
29.8
 
 
 
 
 
38.9
30.6
 
 
57
10.1
21
40.2
31.5
 
 
V
V
V
V
V
V
TURNON
V
CC
 Turn-On Voltage
Voltage With Respect to GND
l
14
15.3
16.6
V
V
TURNOFF
V
CC
 Turn-Off Voltage
Voltage With Respect to GND
l
8
9.7
11
V
V
HYST
V
CC
 Hysteresis
V
TURNON
  V
TURNOFF
l
4
5.6
7.2
V
V
CLAMP
V
CC
 Shunt Regulator Voltage
I
VCC
 = 15mA, V
UVLO
 = 0V, Voltage With
Respect to GND
l
19.5
20.2
V
I
VCC
V
CC
 Supply Current
V
CMP
 = Open (Note 11)
l
4
6.4
10
mA
I
VCC_START
V
CC
 Start-Up Current
V
CC
 = 10V
l
180
400
礎(chǔ)
V
FB
Feedback Regulation Voltage
l
1.22
1.237
1.251
V
I
FB_BIAS
Feedback Pin Input Bias Current
R
CMP
 Open
200
nA
g
m
Feedback Amplifier
Transconductance
l
700
1000
1400
A/V
I
FB
Feedback Amplifier Source or Sink
Current
l
25
55
90
礎(chǔ)
V
FBCLAMP
Feedback Amplifier Clamp Voltage
V
FB
 = 0.9V
V
FB
 = 1.4V
2.56
0.84
V
V
%V
REF
Reference Voltage Line Regulation
12V d V
CC
 d 18V
l
0.005
0.02
%/V
A
V
Feedback Amplifier Voltage Gain
V
CMP
 = 1.2V to 1.7V
1500
V/V
I
SFST
Soft-Start Charging Current
V
SFST
 = 1.5V
16
20
25
礎(chǔ)
I
SFST
Soft-Start Discharge Current
V
SFST
 = 1.5V, V
UVLO
 = 0V
0.8
1.3
mA
V
CMP_THLD
Control Pin Threshold (VCMP)
Duty Cycle = Min
1
V
V
PG_HIGH
,
V
SG_HIGH
PG, SG, Output High Level
l
6.6
7.4
8
V
V
PG_LOW
,
V
SG_LOW
PG, SG, Output Low Level
l
0.01
0.05
V
V
PG_SHDN
,
V
SG_SHDN
PG, SG, Output Shutdown Strength
V
UVLO
 = 0V; I
PG
, I
SG
 = 20mA
l
1.4
2.3
V
t
PG_RISE
,
t
SG_RISE
PG, SG Rise Time
C
PG
, C
SG
 = 1nF
15
ns
t
PG_FALL
,
t
SG_FALL
PG, SG Fall Time
C
PG
, C
SG
 = 1nF
15
ns
V
SENSE_LIM
Switch Current Threshold at Maximum
V
CMP
Measured at V
SENSE+
l
88
100
110
mV
DV
SENSE
/DV
CMP
Sense Threshold vs V
CMP
0.07
V/V
V
SENSE_OC
Sense Pin Overcurrent Fault Voltage
V
SENSE+
, V
SFST
 < 1V
l
205
230
mV
V
IH_SHDN
Shutdown High Level Input Voltage
With Respect to V
PORTN
 
High Level = Shutdown (Note 12)
l
3
57
V
V
IL_SHDN
Shutdown Low Level Input Voltage
With Respect to V
PORTN
l
0.45
V
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