參數(shù)資料
型號： LTC4268IDKD-1#PBF
廠商： Linear Technology
文件頁數(shù)： 28/46頁
文件大?。?/td> 419K
描述： IC PD HIGH POWER W/CNTRL 32-DFN
產品培訓模塊： Power over Ethernet
標準包裝： 52
類型： 以太網供電開關（PoE）
應用： 遠程外設（工業(yè)控制，相機，數(shù)據(jù)訪問）
內部開關： 是
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 32-WFDFN 裸露焊盤
供應商設備封裝： 32-DFN（7x4）裸露焊盤
包裝： 管件
LTC4268-1
28
42681fc
applicaTions inForMaTion
lowpass filtered by the internal 50k resistor R
CMPF
 and
the external capacitor on C
CMP
. This voltage is impressed
across the external R
CMP
  resistor by op amp A1 and
transistor Q3 producing a current at the collector of Q3 that
is subtracted from the FB node. This effectively increases
the voltage required at the top of the R1/R2 feedback
divider to achieve equilibrium.
The average primary side switch current increases to
maintain output voltage regulation as output loading
increases. The increase in average current increases R
CMP
 
resistor current which affects a corresponding increase
in sensed output voltage, compensating for the IR drops.
Assuming relatively fixed power supply efficiency, Eff,
power balance gives:
   P
OUT
 = Eff " P
IN
   V
OUT
 " I
OUT
 = Eff " V
IN
 " I
IN
Average primary side current is expressed in terms of
output current as follow:
 
  I
IN
=K1 I
OUT
where:
  K1=
V
OUT
V
IN
Eff
So the effective change in V
OUT
 target is:
 
  DV
OUT
=K1
R
SENSE
R
CMP
R1 N
SF
thus:
 
DV
OUT
DI
OUT
=K1
R
SENSE
R
CMP
R1 N
SF
where:
   K1 = dimensionless variable related to V
IN
,
   
V
OUT
 and efficiency as explained above
   R
SENSE
 = external sense resistor
Nominal output impedance cancellation is obtained by
equating this expression with R
S(OUT)
:
 
K1
R
SENSE
R
CMP
R1 N
SF
=
ESR+R
DS(ON)
1DC
Solving for R
CMP
 gives:
 
R
CMP
=K1
R
SENSE
1DC
(
)
ESR+R
DS(ON)
R1 N
SF
The practical aspects of applying this equation to determine
an appropriate value for the R
CMP
 resistor are found in the
Applications Information.
Transformer Design
Transformer design/specification is the most critical part of
a successful application of the LTC4268-1. The following
sections provide basic information about designing the
transformer and potential trade-offs. If you need help, the
LTC Applications group is available to assist in the choice
and/or design of the transformer.
Turns Ratios
The design of the transformer starts with determining
duty cycle (DC). DC impacts the current and voltage stress
on the power switches, input and output capacitor RMS
currents and transformer utilization (size vs power). The
ideal turns ratio is:
 
N
DEAL
=
V
OUT
V
IN
1DC
DC
Avoid extreme duty cycles as they, in general, increase
current stresses. A reasonable target for duty cycle is 50%
at nominal input voltage.
For instance, if we wanted a 48V to 5V converter at 50%
DC then:
 
N
DEAL
=
5
48
10.5
0.5
=
1
9.6
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