參數(shù)資料
型號: LRS1341
廠商: Sharp Corporation
英文描述: Stacked Chip 16M Flash Memory and 2M SRAM
中文描述: 堆疊芯片1,600快閃記憶體以及2M SRAM
文件頁數(shù): 10/24頁
文件大?。?/td> 197K
代理商: LRS1341
LRS1341/LRS1342
Stacked Chip (16M Flash & 2M SRAM)
10
Data Sheet
Write Cycle (F-WE Controlled)
1
T
A
= -25
°
C to +85
°
C, V
CC
= 2.7 V to 3.6 V
NOTES:
1. Read timing characteristics during block erase and word write operations are the same as
during read-only operations. Refer to AC Characteristics for Read Cycle.
2. Refer to the
Flash Memory Command Definition
section for valid A
IN
and D
IN
for block erase or word write.
PARAMETER
SYMBOL
MIN.
MAX.
UNIT
Write Cycle Time
F-RP HIGH Recovery to F-WE going to LOW
F-CE Setup to F-WE going LOW
F-WE Pulse Width
F-RP V
HH
Setup to F-WE going HIGH
F-WP V
IH
Setup to F-WE going HIGH
F-V
PP
Setup to F-WE going HIGH
Address Setup to F-WE going HIGH
2
Data Setup to F-WE going HIGH
2
Data Hold from F-WE HIGH
Address Hold from F-WE HIGH
F-CE Hold from F-WE HIGH
F-WE Pulse Width HIGH
F-WE HIGH to F-RY/BY going LOW
Write Recovery before Read
F-V
PP
Hold from Valid SRD, F-RY/BY HIGH-Z
F-RP V
HH
Hold from Valid SRD, F-RY/BY HIGH-Z
F-WP V
IH
Hold from Valid SRD, F-RY/BY HIGH
t
AVAV
t
PHWL
t
ELWL
t
WLWH
t
PHHWH
t
SHWH
t
VPWH
t
AVWH
t
DVWH
t
WHDX
t
WHAX
t
WHEH
t
WHWL
t
WHRL
t
WHGL
t
QVVL
t
QVPH
t
QVSL
100
10
0
50
100
100
100
50
50
0
0
0
30
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
100
0
0
0
0
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