參數(shù)資料
型號: LP1072
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 802.11a/b/g Baseband System Solution
中文描述: 802.11a/b/g無線基帶系統(tǒng)解決方案
文件頁數(shù): 7/32頁
文件大?。?/td> 293K
代理商: LP1072
Functional Description
LP1072 Advance Information, Rev. 0.3
Freescale Semiconductor
7
PRELIMINARY
3.4
Analog Front End (AFE)
The Analog Front End (AFE) block consists of three Analog-to-Digital Converters (ADCs) and two
Digital-to-Analog Converters (DACs) as given in
Table 2
.
3.4.1
I/Q ADC
I/Q ADC specifications are shown in
Table 3
.
Table 2. AFE Components
Component
Description
Resolution
Clock
I/Q ADC
A 2-channel ADC whose digital output serves as input to digital baseband
and whose input is the differential signal from the RF (RX mode).
8-bit
22 Msps
I/Q DAC
A 2-channel DAC whose digital input is from baseband and output is a
differential signal for the RF (TX mode).
8-bit
44 Msps
RSSI ADC
A single ended, single channel ADC
6-bit
10 Msps
Auxiliary ADC
A single ended, single channel ADC
8-bit
1 Msps
Auxiliary DAC
A single ended, single channel DAC
8-bit
20 Msps
Table 3. I/Q ADC Specifications
Parameter
Condition
Min
Typ
Max
Units
Resolution
8
bit
Maximum Sampling Frequency
22
MHz
Signal Bandwidth
11
MHz
Input impedance
Fixed capacitance
1
pF
Switched capacitance @Fs
1
pF
Latency
4
cycles
Integral Nonlinearity (INL)
±1.0
LSB
Differential Nonlinearity (DNL)
± 0.5
LSB
Total Harmonic Distortion (THD)
Fin= 1MHz
-48.5
dB
Fin= 10MHz
-47
dB
SNR
Fin= 1MHz
48.5
dB
Fin= 10MHz
47
dB
ENOB
Fin= 1MHz
7.2
bit
Fin= 10MHz
7.0
bit
Channel-to-Channel mismatch
Gain
0.2
dB
Phase
0.5
Degree
DC offset after calibration
-1
+1
LSB
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