參數(shù)資料
型號: LP1072
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 802.11a/b/g Baseband System Solution
中文描述: 802.11a/b/g無線基帶系統(tǒng)解決方案
文件頁數(shù): 3/32頁
文件大?。?/td> 293K
代理商: LP1072
Specifications
LP1072 Advance Information, Rev. 0.3
Freescale Semiconductor
3
PRELIMINARY
JTAG Interface for testing and debugging
Hardware engines for WEP, TKIP and AES support for less processor load
Supports Direct Conversion (Zero-IF) radio architecture, saving RF components thus reducing
BOM cost and simplifying board layout
Generic RF interface that lets it work with virtually an WLAN RF components. Currently fully
tested with RF from Maxim and Airoha.
Total PHY flexibility in meeting customer requirements by providing software-controlled trade-off
between competing performance metrics
2
Specifications
Table 1. Specifications
Feature
Details
Network Standard Support
IEEE 802.11 a/b/g
Network Architectures
Infrastructure, AdHoc
Data Rates
802.11 a/g: 6, 9, 12, 18, 24, 36, 48, 54 Mbps
802.11b:1, 2, 5.5, 11 Mbps
Modulation Techniques
BPSK, QPSK, 16QAM, 64QAM, CCK, OFDM, DSSS
Security
40- and 128-bit WEP, TKIP, WPA, AES
Receiver Sensitivity
(Using Maxim RF)
802.11g 802.11b
6 Mbps:–91.0 dBm1Mbps:–97.1 dBm
9 Mbps: –89.7 dBm2 Mbps: –93.6 dBm
12 Mbps: –87.3 dBm5.5Mbps: –92.2 dBm
18 Mbps: –85.8 dBm11Mbps: –89.5 dBm
24 Mbps:–81.4 dBm
36 Mbps: –78.3 dBm
48 Mbps: –74.8 dBm
54Mbps: –73.0 dBm
Power Consumption
Receive:150 mW avg (@54Mbps)
Listen: 132 mW
Sleep:Less than1 mW
Supply Voltage
I/O: 3.3
±
0.3 Vdc
Core:1.8
±
5% Vdc
Operating Temperature
0
o
C to +70
o
C; < 95% humidity
Host Interfaces
SDIO; compliant with SDIO Card Specifications, Version 1.00
CompactFlash+; compliant with CF+ and Compact Flash Specs Rev 2.0
16-bit SRAM emulation mode
Other Interfaces
JTAG
8 GPIO pins
One UART
Serial EEPROM
Operating System Support
Microsoft Windows CE.net 3.0, 4.2
Microsoft Pocket PC 2002, 2003
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