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參數(shù)資料
| 型號： | LP1072 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 802.11a/b/g Baseband System Solution |
| 中文描述： | 802.11a/b/g無線基帶系統(tǒng)解決方案 |
| 文件頁數(shù)： | 14/32頁 |
| 文件大小： | 293K |
| 代理商： | LP1072 |
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LP1072 Advance Information, Rev. 0.3
14
Freescale Semiconductor
PRELIMINARY
LP1072 Interfaces
SDIO Host Mailbox Semaphore 2 Register (offset 0x001E)
1:0
Sdio_mbxp_2_sema
2 bit semaphore register to control whether the
host or the device has access to the shared
mailbox ram 2. The host should write a “01” to this
register to request the shared ram 2. After writing
“01” the host should read this register. If the value
is “01” then the host owns access to the mailbox.
If the value read is “11” then the device owns
access to the mailbox. When the host is done
utilizing the mailbox then it should release
ownership of the mailbox by writing “00” to this
register.
RW
RW
0’s
7:2
Reserved
-
-
-
-
992 byte Mailbox RAM 1 (offset 0x200F to 0x23FF)
7:0
Mbox_rdata_1[15:0]
Shared SDIO Mailbox. Both the ARM and Host
can use the mailbox for message exchange
between the SDIO device and the SDIO Host.
Prior to accessing the SDIO Mailbox the Host
should request and be granted the mailbox via the
mailbox semaphore 1 register described above.
Once the Host has been granted access to the
mailbox it may read/write the mailbox however it
likes. If the Host has not been granted access to
the mailbox it will not be able to read or write the
mailbox. Once the Host is finished with the
mailbox it should release control of the mailbox as
described in the mailbox semaphore 1 register.
RW
RW
-
1 Kbyte Mailbox RAM 2 (offset 0x2400 to 0x27FF)
7:0
Mbox_rdata_2[15:0]
Shared SDIO Mailbox. Both the ARM and Host
can use the mailbox for message exchange
between the SDIO device and the SDIO Host.
Prior to accessing the SDIO Mailbox the Host
should request and be granted the mailbox via the
mailbox semaphore 2 register described above.
Once the Host has been granted access to the
mailbox it may read/write the mailbox however it
likes. If the Host has not been granted access to
the mailbox it will not be able to read or write the
mailbox. Once the Host is finished with the
mailbox it should release control of the mailbox as
described in the mailbox semaphore 2 register.
RW
RW
-
Table 8. SDIO Function 1 Registers (continued)
Bit
Name
Description
ARM
Access
HOST
Access
Reset
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