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參數(shù)資料
| 型號(hào)： | LP1072 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | 802.11a/b/g Baseband System Solution |
| 中文描述： | 802.11a/b/g無(wú)線基帶系統(tǒng)解決方案 |
| 文件頁(yè)數(shù)： | 20/32頁(yè) |
| 文件大小： | 293K |
| 代理商： | LP1072 |
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LP1072 Advance Information, Rev. 0.3
20
Freescale Semiconductor
PRELIMINARY
Pinout and Footprint
CF_A8
pdb04dgz
Bi-dir
CompactFlash address
P9
CF_A9
pdb04dgz
Bi-dir
CompactFlash address
P10
CF_A10
pdb04dgz
Bi-dir
CompactFlash address
R13
CF_OE_N
pdusdgz
Input
CF common or attribute memory indication
N12
CF_IORD_N
pdusdgz
Input
I/O read in conjunction with reg and ce1/2
P12
CF_IOWR_N
pdusdgz
Input
I/O write in conjunction with reg and ce1/2
P13
CF_WE_N
pdusdgz
Input
Common or attribute memory write enable
R15
CF_IREQ_N
pdt04dgz
Output
I/O mode interrupt request (pulsed low or level sensitive)
N14
CF_RESET
pdudgz
Input
Reset
P15
CF_CD1_N
pdt04dgz
Output
Card detect
L13
CF_CD2_N
pdt04dgz
Output
Card detect
K12
CF_INPACK_N
pdt04dgz
Output
Decode indication (not widely implemented)
J12
CF_STSCHG_N
pdo04dgz
Output
Status Change
K14
CF_REG_N
pdusdgz
Input
Cycle indication
J14
AFE Interface
AGND
pdiana2p
N/A
Analog ground Double bonded with Analog Reference
negative supply)
E6
AGNDIQADC
pdiana2p
N/A
Analog ground
E8
AGNDIQDAC
pdiana2p
N/A
Analog ground
D8
AVDD
pdiana2p
N/A
Analog 3.3 volt
A3
AVDDIQADC
pdiana2p
N/A
Analog 3.3 volt
D7
AVDDIQDAC
pdiana2p
N/A
Analog 3.3 volt
A9
VDDIQADC
pvdd3p
N/A
3.3 volt power for ESD Diodes
A4
VSSIQADC
pvss3p
N/A
3.3 volt ground for ESD Diodes
E7
VDDIQDAC
pvdd3p
N/A
3.3 volt power for ESD Diodes
D2
DGND
pvss1dgz
N/A
Digital Ground
B2
DVDD
pvdd1dgz
N/A
Digital 1.8 Volt
C2
IBIAS
pdiana2p
N/A
Pin for monitoring or bypassing bias current, flowing out of
the pin to agnd.
B3
VBG
pdiana2p
N/A
Voltage reference pin for decoupling (equal to 1.25V).
Connect 1uF(ceramic) + 100nF (ceramic) to agndref.
B5
VREFN
pdiana2p
Input
ADC Negative reference for decoupling
A5
VREFP
pdiana2p
Input
ADC Positive reference for decoupling
A7
AUXADCIN_0
pdiana2p
Input
Muxed analog input to auxiliary ADC bit 0
C5
AUXADCIN_1
pdiana2p
Input
Muxed analog input to auxiliary ADC bit 1
D5
AUXADCIN_2
pdiana2p
Input
Muxed analog input to auxiliary ADC bit 2
B4
Table 9. Pin Description (continued)
Pad Name
Pad Type
Direction
Description
Pin
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LPR30 | LOW DROP VOLTAGE REGULATOR DRIVE FOR EXTERNAL N-CHANNEL POWER MOSFET |
| LPR30D | LOW DROP VOLTAGE REGULATOR DRIVE FOR EXTERNAL N-CHANNEL POWER MOSFET |
| LPR30D-TR | LOW DROP VOLTAGE REGULATOR DRIVE FOR EXTERNAL N-CHANNEL POWER MOSFET |
| LPR30N | LOW DROP VOLTAGE REGULATOR DRIVE FOR EXTERNAL N-CHANNEL POWER MOSFET |
| LRI512 | Memory TAG IC 512 bit High Endurance EEPROM 13.56MHz, ISO 15693 Standard Compliant with E.A.S. |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP108 | 功能描述:開關(guān)配件 UNDERLOAD RoHS:否 制造商:C&K Components 類型:Cap 用于:Pushbutton Switches 設(shè)計(jì)目的: |
| LP1083 | 制造商:FCI 制造商全稱:First Components International 功能描述:LOW DROPOUT POSITVITE ADJUSTABLE REGULATOR |
| LP1083CM | 制造商:FCI 制造商全稱:First Components International 功能描述:LOW DROPOUT POSITVITE ADJUSTABLE REGULATOR |
| LP1083CZ | 制造商:FCI 制造商全稱:First Components International 功能描述:LOW DROPOUT POSITVITE ADJUSTABLE REGULATOR |
| LP1083IZ | 制造商:FCI 制造商全稱:First Components International 功能描述:LOW DROPOUT POSITVITE ADJUSTABLE REGULATOR |
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