參數(shù)資料
型號(hào)： LMK04002BEVAL
廠商： National Semiconductor
文件頁(yè)數(shù)： 53/65頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL PRECISION CLOCK PLL
標(biāo)準(zhǔn)包裝： 1
系列： PowerWise®
主要目的： 計(jì)時(shí)，時(shí)鐘調(diào)節(jié)器
嵌入式： 否
已用 IC / 零件： LMK04002
主要屬性： 122.88 MHz VCXO
次要屬性： 集成式 PLL 和 VCO
已供物品： 板，線纜
產(chǎn)品目錄頁(yè)面： 1275 (CN2011-ZH PDF)
100
1000
10000
100000
OFFSET (Hz)
-170
-160
-150
-140
-130
-120
-110
-100
-90
-80
d
Bc
1000000
10000000
100000000
s yK
^ _, RMS jitter = 224 fs
s yK
^ _, RMS jitter = 167 fs
100
1000
10000
100000
OFFSET (Hz)
-170
-160
-150
-140
-130
-120
-110
-100
-90
-180
d
Bc
1000000
10000000
100000000
s yK
^ _
s yK
^ _
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
Figure 32. VCXO Phase Noise Comparison, 100 MHz
This plot shows that VCXO “B” exhibits superior phase noise when compared to VCXO “A”. Both VCXOs offer
excellent jitter performance from 100 Hz to 200 kHz. VCXO “A” exhibits RMS jitter of 151 femtoseconds (fs),
while VCXO “B” has RMS jitter of 90 fs.
Figure 33 Figure 34 Figure 35 present a side-by-side comparison of clock output phase noise at 250 MHz,
organized by output format and associated VCXO. The total RMS jitter listed on the plots is integrated from 100
Hz to 20 MHz. Examining these plots, the clock output phase noise associated with VCXO “B” is superior in all
cases. The average improvement in RMS jitter due to VCXO “B” is approximately 47 fs. The plots show the
primary difference in clock output phase noise is in the band from 100 Hz to approximately 4 kHz. Across this
range, the VCXO phase noise dominates that of the PLL, given the loop bandwidth of this design, which is 152
kHz. Above 4 kHz, the PLL noise dominates (inside the loop bandwidth), so it is basically the same for either
VCXO. Comparing the jitter of two VCXOs in the 100 Hz to 4 kHz band, it can be shown that VCXO “A” exhibits
jitter of 142 fs, and VCXO “B” exhibits jitter of 90 fs. The difference, 52 fs, accounts for the majority of the
average difference in RMS jitter at the clock outputs when comparing VCXOs.
The PLL configurations listed below were the same for both VCXOs/LMK040xx pair:
PLL1 loop filter components: C1 = 100 nF, C2 = 680 nF, R2 = 39 k
Ω
PLL1 fPD = 1 MHz, CP gain = 100 A, loop BW = 20 Hz
PLL2 loop filter components: C1 = 0, C2 = 12 nF, R2 = 1.8 k
Ω
PLL2 fPD = 25 MHz, CP gain = 3200 A, loop BW = 152 kHz
Figure 33. LVDS Clock Output Phase Noise Comparison, 250 MHz
Copyright 2008–2011, Texas Instruments Incorporated
57
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參數(shù)描述
LMK04002BEVAL/NOPB 功能描述:BOARD EVAL FOR LMK04002B RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:PowerWise® 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:數(shù)字電位器 嵌入式:- 已用 IC / 零件:AD5258 主要屬性:- 次要屬性:- 已供物品:板 相關(guān)產(chǎn)品:AD5258BRMZ1-ND - IC POT DGTL I2C1K 64P 10MSOPAD5258BRMZ10-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ100-ND - IC POT DGTL I2C 100K 64P 10MSOPAD5258BRMZ50-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ1-R7-ND - IC POT DGTL I2C 1K 64P 10MSOPAD5258BRMZ10-R7-ND - IC POT DGTL I2C 10K 64P 10MSOPAD5258BRMZ50-R7-ND - IC POT DGTL I2C 50K 64P 10MSOPAD5258BRMZ100-R7-ND - IC POT DGTL I2C 100K 64P 10MSOP
LMK04002BISQ 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low-Noise Clock Jitter Cleaner with Cascaded PLLs
LMK04002BISQ/NOPB 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
LMK04002BISQE 制造商:Texas Instruments 功能描述:Clock Conditioner 48-Pin LLP EP T/R
LMK04002BISQE/NOPB 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
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