參數(shù)資料
型號(hào)： LM1253AN
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 畫(huà)面疊加
英文描述： Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator
中文描述： ON-SCREEN DISPLAY IC, PDIP28
封裝： 0.600 INCH, PLASTIC, DIP-28
文件頁(yè)數(shù)： 9/57頁(yè)
文件大?。?/td> 1621K
代理商： LM1253AN
Pin Descriptions
(Continued)
as the DC clamp control capacitors. A value of 0.0047 μF is
used in the demo boards. The schematic shown in Figure 29
which has a series resistance of 33
and clamp diodes to
V
and ground should be used to protect the LM1253A
from ESD. A good ground should be between the input con-
nector and the LM1253A. The video traces should be kept
short. Figure 29 shows the external schematic of pins 4, 5,
and 6, Figure 14 shows the internal schematic of pins 4, 5,
and 6.
Pin 7—Analog Ground
Ground for the video section of the
LM1253A. All ground pins of the LM1253A should be con-
nected together by a ground plane under the LM1253A. See
Figure 31 which shows a sample layout.
Pin 8—Analog Supply
5V supply for the video section of
the preamp. A 0.1 μF capacitor should be connected be-
tween pin 7 and pin 8, as close as possible to the LM1253A.
A 100 μF capacitor should also be connected between pin 7
and pin 8.
Pin 9—Analog Supply
5V supply for the PLL section of the
LM1253A. A 0.1 μF capacitor should be connected between
pin 9 and pin 7, as close as possible to the LM1253A.
Pin 10—PLL Ground
Ground for the PLL section of the
LM1253A. Only the PLL components connected to pin 11
should be connected to this ground pin. Pin 10 should also
be connected to the ground plane under the LM1253A. All
ground pins of the LM1253A should be connected together
by a ground plane under the LM1253A. See Figure 31 which
shows a sample layout.
Pin 11—PLL C
A resistor capacitor network is connected to
this pin. It is used to convert the charge current of the charge
pump of the PLL into a voltage that is used to control the
variable oscillator. These components should be located
very close to the LM1253A with a short ground trace to pin
10.
The recommended values are R28 = 6.2 k
, C23 = 0.1 μF,
and C33 = 2.2 nF. When these component values are used
the range and gain values in Table 12 can be loaded into
register 843Eh.
An example layout is shown in Figure 31 Figure 29 shows
the external schematic of pin 11, Figure 15 shows the inter-
nal schematic.
Pin 12—ABL
The Auto Beam Limit control reduces the gain
of the video amplifiers in response to a control voltage pro-
portional to the CRT beam current. The ABL acts on all three
channels in an identical manner. This is required for CRT life
and X-ray protection. The beam current limit circuit applica-
tion is as shown in Figure 7 when no current is being drawn
by the EHT supply, current flows from the supply rail through
the ABL resistor and into the ABL input of the IC. The IC
clamps the input voltage to a low impedance voltage source
(the 5V supply rail).
When current is drawn from the EHT supply, the current
passes through the ABL resistor, and reduces the current
flowing into the ABL input of the IC.
When the EHT current is high enough, the current flowing
into the ABL input of the IC drops to zero. This current level
determines the ABL threshold and is given by:
Where:
V
S
is the external supply (usually the CRT driver supply rail,
about 80V)
V
ABL TH
is the threshold ABL voltage of the IC
R
ABL
is the ABL resistor value
I
ABL
is the ABL limit
When the voltage on the ABL input drops below the ABL
threshold of the pre-amp, the gain of the pre-amp decreases,
which is shown in Figure 8 which reduces the beam current.
Afeedback loop is thus established which acts to prevent the
average beam current exceeding I
ABL
.
Figure 29 shows the external schematic of pin 12, Figure 16
shows the internal schematic.
DS101265-12
FIGURE 7. ABL
L
www.national.com
9
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