- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄358809 > LM1253AN (NATIONAL SEMICONDUCTOR CORP) Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator PDF資料下載
參數(shù)資料
| 型號： | LM1253AN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 畫面疊加 |
| 英文描述： | Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator |
| 中文描述： | ON-SCREEN DISPLAY IC, PDIP28 |
| 封裝： | 0.600 INCH, PLASTIC, DIP-28 |
| 文件頁數(shù)： | 45/57頁 |
| 文件大?。?/td> | 1621K |
| 代理商： | LM1253AN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁當(dāng)前第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁
Control Register Definitions
(Continued)
Red Bias Clamp Pulse Amplitude Control Register (I
2
C address 8436h).
REGISTER NAME: RBIASCTRL (8436h)
Bit 7
Bit 0
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
Bits 7–0: Red Channel Bias Clamp Pulse Amplitude Control. These six bits determine the bias clamp value for its pulse ampli-
tude.
Brightness Amplitude Control Register (I
2
C address 8437h).
REGISTER NAME: BRIGHTCTRL (8437h)
Bit 7
Bit 0
BA7
BA6
BA5
BA4
BA3
BA2
BA1
BA0
Bits 7–0: Brightness Amplitude Control. These six bits determine amplitude of brightness for all three channels.
DC Offset and OSD Contrast Control Register (I
2
C address 8438h).
REGISTER NAME: DCOFFSET (8438h)
Bit 7
Bit 0
BP2
BP1
BP0
OSD C1
OSD C0
DC2
DC1
DC0
Bits 2–0: DC Offset Control. These three bits determine the active video DC offset to all three channels.
Bits 4–3: OSD Contrast. These two bits determine the OSD contrast.
Bits 7–5: Blanking pedestal. These three bits determine the blanking pedestal offset for all three channels.
Global Video Control Register (I
2
C address 8439h).
REGISTER NAME: GLOBALCTRL (8439h)
Bit 7
Bit 0
RSV
RSV
RSV
RSV
RSV
RSV
PS
BV
Bit 0:
Bit 1:
Blank Video. When this bit is a one, the video output is blanked. When this bit is a zero normal video is output.
Power Save. When this bit is a one, the analog circuits are shutdown to support sleep mode. When this bit is a zero
the analog circuits are enabled for normal operation. See the Power Save Mode section.
Bits 7–2: RESERVED.
PLL Frequency Range Control Register (I
2
C address 843Eh).
REGISTER NAME: PLLFREQRNG (843Eh)
Bit 7
Bit 0
RSV
RSV
RSV
RSV
IVS1
IVS0
PFR1
PFR0
Bits 1–0: PLL Frequency Range Control. These bits assist the PLL in locking to the desired pixel frequency. PLL Range should
be set as shown in Table 12
Bits 3–2: Sets the approximate Free Run Frequency.
00: 38 kHz, 01: 43 kHz, 10: 47 kHz, 11: 52 kHz.
Bits 7–4: RESERVED. Set to 0
L
www.national.com
45
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LM1253A | Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator |
| LM1262 | 200 MHz I2C Compatible RGB Video Amplifier System with OSD and DACs |
| LM1262NA | 200 MHz I2C Compatible RGB Video Amplifier System with OSD and DACs |
| LM1267NA | 150 MHz I2C Compatible RGB Video Amplifier System with OSD and DACs |
| LM1267 | 150 MHz I2C Compatible RGB Video Amplifier System with OSD and DACs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM-1256 | 制造商:ROHM 制造商全稱:Rohm 功能描述:16 x 16 matrix displays |
| LM-1256_1 | 制造商:ROHM 制造商全稱:Rohm 功能描述:16】16 matrix displays |
| LM-1256LB1 | 制造商:ROHM 制造商全稱:Rohm 功能描述:16】16 matrix displays |
| LM125AN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:VOLTAGE REGULATORS |
| LM125H | 制造商: 功能描述: 制造商:undefined 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。