參數(shù)資料
型號(hào)： LM1236
廠商： National Semiconductor Corporation
英文描述： 150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD ROM, 512 Character RAM and 4 DACs
中文描述： 150 MHz的I2C兼容的RGB前置放大器254字符OSD光盤，512個(gè)字符RAM和4 DAC的內(nèi)置
文件頁數(shù)： 5/43頁
文件大?。?/td> 1898K
代理商： LM1236
DAC Output Electrical Characteristics
Unless otherwise noted: T
= 25C, V
= +5.0V, V
= 0.7V, V
= V
, C
= 8 pF, Video Outputs = 2.0 V
P-P
. See (Note 7)
for Min and Max parameters and (Note 6) for Typicals. DAC parameters apply to all 4 DACs.
Symbol
Parameter
Conditions
Min
Typ
0.5
Max
0.7
Units
V
V
Min DAC
V
Max DAC
Mode 00
V
Max DAC
Mode 01
V
Max DAC
(Temp)
V
Max DAC
(V
CC
)
Min Output Voltage of DAC
Max Output Voltage of DAC
Register Value = 0x00
Register Value = 0xFF,
DCF[1:0] = 00b
Register Value = 0xFF,
DCF[1:0] = 01b
0
<
T
<
70C ambient
4.2
V
Max Output Voltage of DAC in
DCF Mode 01
DAC Output Voltage Variation
with Temperature
DAC Output Voltage Variation
with V
CC
Linearity of DAC over its Range
Monotonicity of the DAC
Excluding Dead Zones
Max Load Current
2.35
V
±
0.5
mV/C
V
CC
varied from 4.75V to 5.25V, DAC
register set to mid-range (0x7F)
50
mV
Linearity
Monotonicity
5
%
±
0.5
LSB
I
MAX
1.0
mA
System Interface Signal Characteristics
Unless otherwise noted: T
= 25C, V
= +5.0V, V
= 0.7V, V
= V
, C
= 8 pF, Video Outputs = 2.0 V
P-P
. See (Note 7)
for Min and Max parameters and (Note 6) for Typicals. DAC parameters apply to all 4 DACs.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
VTH+
VFLYBACK Positive Switching
Guarantee
Spot Killer Voltage
V
Ref
Output Voltage (pin 2)
Logic Low Input Voltage
Logic High Input Voltage
Vertical Blanking triggered
2.0
V
V
SPOT
V
Ref
V
IL
(SCL, SDA)
V
IH
(SCL, SDA)
Table 14
, V
CC
Adjusted to Activate
3.4
1.25
0.5
3.9
1.45
4.3
1.65
1.5
V
CC
+
0.5
V
V
V
3.5
V
I
L
(SCL, SDA)
I
H
(SCL, SDA)
V
OL
(SCL, SDA)
f
H
Min
f
H
Max
I
HFB IN
Max
Logic Low Input Current
Logic High Input Voltage
Logic Low Output Voltage
Minimum Horizontal Frequency
Maximum Horizontal Frequency
Horizontal Flyback Input
SDA or SCL, Input Voltage = 0.4V
SDA or SCL, Input Voltage = 4.5V
I
O
= 3 mA
PLL & OSD Functioning; PPL = 0
PLL & OSD Functioning; PPL = 4
Current Absolute Maximum during
Flyback
Design Value
Absolute Maximum during Scan
Not exact - Duty Cycle Dependent
±
10
±
10
0.5
25
110
μA
μA
V
kHz
kHz
5
mA
I
IN
I
HFB OUT
Max
I
OUT
I
IN THRESHOLD
t
H-BLANK ON
Peak Current during Flyback
Horizontal Flyback Input Current
Peak Current during Scan
I
IN
H-Blank Detection Threshold
H-Blank Time Delay - On
4
mA
μA
μA
μA
700
550
0
+ Zero crossing of I
HFB
to 50% of
output blanking start. I
24
= +1.5mA
Zero crossing of I
HFB
to 50% of
output blanking end. I
24
= 100μA
Test Setting 4, AC input signal
45
ns
t
H-BLANK OFF
H-Blank Time Delay - Off
85
ns
V
BLANK
Max
f
FREERUN
Maximum Video Blanking Level
Free Run H Frequency, Including
H Blank
Minimum Clamp Pulse Width
Maximum Low Level Clamp
Pulse Voltage
Minimum High Level Clamp
Pulse Voltage
Clamp Gate Low Input Current
0
0.25
V
42
kHz
t
PW CLAMP
V
CLAMP MAX
See (Note 15)
Video Clamp Functioning
200
ns
2.0
V
V
CLAMP MIN
Video Clamp Functioning
3.0
V
I
CLAMP
Low
V
23
= 2V
0.4
μA
L
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