參數(shù)資料
型號(hào): LM1236
廠商: National Semiconductor Corporation
英文描述: 150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD ROM, 512 Character RAM and 4 DACs
中文描述: 150 MHz的I2C兼容的RGB前置放大器254字符OSD光盤(pán),512個(gè)字符RAM和4 DAC的內(nèi)置
文件頁(yè)數(shù): 35/43頁(yè)
文件大小: 1898K
代理商: LM1236
Control Register Definitions
(Continued)
Bits 8–0
This register determines the starting address of Display Window 1 in the Display Page RAM. The
power-on default of 0x00 starts Window 1 at the beginning of the Page RAM (0x8000). This first
address location always contains the SL code for the first line of Display Window 1. This register is
new for the LM1236 and allows Window 1 to start anywhere in the Page RAM rather than just at
0x8000. Note that the address this points to in Page RAM must always contain the SL code for the
first line of the window.
These bits are reserved and should be set to zero.
Bits 15–9
Display Window 1 Column Width:
COLWIDTH1B3 (0x8417)
COLWIDTH1B2 (0x8416)
Window 1 Column Width - High Bytes
COL[31:16]
COLWIDTH1B1 (0x8415)
COLWIDTH1B0 (0x8414)
Window 1 Column Width - Low Bytes
COL[15:0]
Bits 31–0
These are the Display Window 1 Column Width 2x Enable Bits. These thirty-two bits correspond to
columns 31–0 of Display Window 1, respectively. A value of zero indicates the column will have
normal width (12 pixels). A “1” indicates the column will be twice as wide as normal (24 pixels). For
the double wide case, each Character Font pixel location will be displayed twice, in two
consecutive horizontal pixel locations. The user should note that if more than 32 display characters
are programmed to reside on a line, then all display characters after the first thirty-two will have
normal width (12 pixels).
Display Window 2 Horizontal Start Address:
HSTRT2 (0x8418)
Window 2 Horizontal Start Address
2H[7:0]
Bits 7–0
This register determines the horizontal start position of Window 2 in OSD pixels (not video signal pixels). The actual
position, to the right of the horizontal flyback pulse, is determined by multiplying this register value by 4 and adding
30. Due to pipeline delays, the first usable start location is approximately 42 OSD pixels following the horizontal
flyback time. For this reason, we recommend this register be programmed with a number larger than 2, otherwise
improper operation may result.
Display Window 2 Vertical Start Address:
VSTRT2 (0x8419)
Window 2 Vertical Start Address
2V[7:0]
Bits 7–0
This register determines the Vertical start position of Window 2 in constant-height character lines (not video scan
lines). The actual position is determined by multiplying this register value by 2. (Note: each character line is treated
as a single auto-height character pixel line, so multiple scan lines may actually be displayed in order to maintain
accurate position relative to the OSD character cell size. (See the
Constant Character Height Mechanism
section.)
This register should be set so the entire OSD window is within the active video.
Display Window 2 Start Address:
W2STRTADRH (0x841B)
Reserved
X
X
W2STRTADRL (0x841A)
Window 2 Start Address
2AD[8:0]
X
X
X
X
X
Bits 8–0
This register determines the starting address of Display Window 2 in the Display Page RAM. The power-on default
of 0x10 starts Window 2 at the midpoint of the Page RAM (0x8100). This location always contains the SL code for
the first line of Window 2.
L
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