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參數(shù)資料
| 型號： | LM1236 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD ROM, 512 Character RAM and 4 DACs |
| 中文描述： | 150 MHz的I2C兼容的RGB前置放大器254字符OSD光盤，512個字符RAM和4 DAC的內(nèi)置 |
| 文件頁數(shù)： | 32/43頁 |
| 文件大?。?/td> | 1898K |
| 代理商： | LM1236 |
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Building Display Pages
(Continued)
TABLE 23. Sequence of Transmitted Bytes
Control Register Definitions
OSD INTERFACE REGISTERS
Frame Control Register 1:
FRMCTRL1 (0x8400)
Fade
i/o
trans
FEN
TD
halftone
HTD
clear
CDPR
win2
D2E
win1
D1E
OSD
OsE
X
Bit 0
On-Screen Display Enable. The On-Screen Display will be disabled when this bit is a zero. When this bit is a one
the On-Screen Display will be enabled. This controls both Window 1 and Window 2.
Display Window 1 Enable. When this bit and Bit 0 of this register are both ones, Display Window 1 is enabled. If
either bit is a zero, then Display Window 1 will be disabled.
Display Window 2 Enable. When this bit and Bit 0 of this register are both ones, Display Window 2 is enabled. If
either bit is a zero, then Display Window 2 will be disabled.
Clear Display Page RAM. Writing a one to this bit will result in setting all of the Display Page RAM values to zero.
This bit is automatically cleared after the operation is complete. This bit is initially asserted by default at power up,
and will clear itself back to zero shortly after. Thus, the default value is one only momentarily, and then will remain
zero until manually asserted again or until the power is cycled.
Transparent Disable. When this bit is a zero, a palette color of black (i.e., color palette look-up table value of 0x00)
in the first 8 palette look-up table address locations (i.e., ATT0–ATT7) will be interpreted as transparent. When this
bit is a one, the color will be interpreted as black.
Fade In/Out Enable. When this bit is a 1, the OSD Fade In/Fade Out function is enabled. When this bit is a 0, the
function is disabled.
Half Tone Disable. When this bit is a 1, the OSD Half Tone Transparency function is disabled. When this bit is a 0,
the half tone transparency is enabled.
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 7
Frame Control Register 2:
FRMCTRL2 (0x8401)
Pixels per Line
PL[2:0]
Blink Period
BP[4:0]
Bits 4–0
Blinking Period. These five bits set the blinking period of the blinking feature, which is determined by mulitiplying
the value of these bits by 8, and then multiplying the result by the vertical field rate.
Pixels per Line. These three bits determine the number of pixels per line of OSD characters. See
Table 24
which
gives the maximum horizontal scan rate. Also see
Table 3
since the maximum recommended scan rate is also a
function of the PLLFREQRNG register, 0x843E[1:0].
Bits 7–5
TABLE 24. OSD Pixels per Line
Bits 7–5
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
Description
704 pixels per line
768 pixels per line
832 pixels per line
896 pixels per line
960 pixels per line
1024 pixels per line
1088 pixels per line
1152 pixels per line
Max Horizontal Frequency (kHz)
110
110
110
110
110
108
102
96
L
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| LM1236AAA/NA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD ROM, 512 Character RAM and 4 DACs |
| LM1237 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs |
| LM1237_04 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs |
| LM1237AAF/NA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs |
| LM1237BAAF/NA | 功能描述:IC PREAMP CMOS 150MHZ 24-DIP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
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