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參數(shù)資料
| 型號： | LM1236 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD ROM, 512 Character RAM and 4 DACs |
| 中文描述： | 150 MHz的I2C兼容的RGB前置放大器254字符OSD光盤，512個字符RAM和4 DAC的內(nèi)置 |
| 文件頁數(shù)： | 30/43頁 |
| 文件大?。?/td> | 1898K |
| 代理商： | LM1236 |
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Building Display Pages
THE OSD WINDOW
The Display Page RAM contains all of the 8-bit display
character codes and their associated 4-bit attribute codes,
and the special 12-bit page control codes—the End-Of-Line,
Skip-Line parameters and End-Of-Screen characters. The
LM1236 has a distinct advantage over many OSD Genera-
tors in that it allows variable size and format windows. The
window size is not dictated by a fixed geometric area of
RAM. Instead, 512 locations of 12-bit words are allocated in
RAM for the definition of the windows, with special control
codes to define the window size and shape.
Window width can be any length supported by the number of
pixels per line that is selected divided by the number of
pixels in a character line. It must be remembered that OSD
characters displayed during the monitor blanking time will
not be displayed on the screen, so the practical limit to the
number of horizontal characters on a line is reduced by the
number of characters within the horizontal blanking period.
The EOS code tells the OSD generator that the character
codes following belong to another displayed window at the
next window location. An EOS code may follow normal char-
acters or an SL code, but never an EOL control code,
because EOL is always followed by an AC plus an SL code.
WRITING TO THE PAGE RAM
The Display Page RAM can contain up to 512 of the above
listed characters and control codes. Each character, or con-
trol code will consume one of the possible 512 locations. For
convenience, a single write instruction to bit 3 of the Frame
Control Register (0x8400) can reset the page RAM value to
all zero. This should be done at power up to avoid unpre-
dictable behaviour.
Display Window 1 will also start at the first location (corre-
sponding to the I
2
C address 0x8000). This location must
always contain the Skip-Line (SL) code associated with the
first line of Display Window 1. The attribute for this SL code
must be written before the SL code itself, and will be stored
in the lower four bits of this memory location. Subsequent
locations should contain the characters to be displayed on
line 1 of Display Window 1, until the EOL code or EOS code
is written into the Display Page-RAM.
The Skip-Line parameters associated with the next line must
always be written to the location immediately after the pre-
ceding line’s End-Of-Line character. The only exception to
this rule is when an End-Of-Screen character (value 0x0000)
is encountered. It is important to note that an End-Of-Line
character should not precede an End-Of-Screen character
(otherwise the End-Of-Screen character will be interpreted
as the next line’s Skip-Line code). Instead, the End-Of-
Screen code will end the line and also end the window,
making it unnecessary to precede it with a EOL. The I
2
C
Format for writing a sequence of display characters is mini-
mized by allowing sequential characters with the same at-
tribute code to send in a string as follows:
Byte
#
1: I
2
C Slave Address
Byte
#
2: LSB Register Address
Byte
#
3: MSB Register Address
Byte
#
4: Attribute Table Entry to use for the following
Skip-Line code or characters
Byte
#
5: First display character, SL parameter, EOL or
EOS control code
Byte
#
6: Second display character, SL parameter, EOL or
EOS control code
Byte
#
7: Third display character, SL parameter, EOL or
EOS control code
Byte
#
n: Last display character in this color sequence, SL
parameter, EOL or EOS control code to use the
associated Attribute Table Entry.
TABLE 15. Sequence of Transmitted Bytes
This communication protocol is known as the Auto Attribute
Mode, which is also used by the LM1237 and LM1247. The
Attribute Entry (Byte #4, of the above) is automatically asso-
ciated with each subsequent display character or SL code
written. Please see examples of usafe for this mode in the
LM1237/LM1247 datasheets.
ENHANCED PAGE RAM ADDRESS MODES
Since the Page RAM in the LM1236 is 12 bits wide, usually two bytes of Page RAM information has to be sent to every location.
To avoid this, the LM1236 addressing control system has 3 additional addressing modes offering increased flexibility that may be
helpful in sending data to the Page RAM. Some of the left over bits in theAttribute byte are employed as data control bits to select
the desired addressing mode as shown in
Table 16
. This is identified as the first byte sent in a write operation or the Page RAM’s
upper byte read in
Table 6
.
TABLE 16. Attribute Byte
ATTRIBUTE Byte
X
X
DC[1]
DC[0]
ATT[3:0]
AUTO ATTRIBUTE MODE
TheAutoAttribute mode is the standard LM1237 mode that is described above in the WRITING TO THE PAGE RAM section. The
attribute byte is shown in
Table 17
.
L
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|---|---|
| LM1236AAA/NA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD ROM, 512 Character RAM and 4 DACs |
| LM1237 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs |
| LM1237_04 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs |
| LM1237AAF/NA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD and 4 DACs |
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