參數(shù)資料
型號: LM1236
廠商: National Semiconductor Corporation
英文描述: 150 MHz I2C Compatible RGB Preamplifier with Internal 254 Character OSD ROM, 512 Character RAM and 4 DACs
中文描述: 150 MHz的I2C兼容的RGB前置放大器254字符OSD光盤,512個字符RAM和4 DAC的內(nèi)置
文件頁數(shù): 37/43頁
文件大?。?/td> 1898K
代理商: LM1236
Pre-Amplifier Interface Registers
(Continued)
Bits 6–0
This register determines the gain of the red video channel. This affects only the red channel
whereas the contrast register (0x8433) affects all channels.
Reserved and should be set to zero.
Bit 7
Contrast Control:
CONTRCTRL (0x8433)
Res’d
X
Contrast
CG[6:0]
Bits 6–0
Bit 7
This register determines the contrast gain and affects all three channels, blue, red and green.
Reserved and should be set to zero.
DAC 1 Output Level:
DAC1CTRL (0x8434)
DAC 1 Output Level
BC[7:0]
Bits 7–0
This register determines the output of DAC 1. The full-scale output is determined by bit 5 of the
DAC Config, OSD Contrast & DC Offset Register.
DAC 2 Output Level:
DAC2CTRL (0x8435)
DAC 2 Output Level
GC[7:0]
Bits 7–0
This register determines the output of DAC 2. The full-scale output is determined by bit 5 of the
DAC Config, OSD Contrast & DC Offset Register.
DAC 3 Output Level:
DAC3CTRL (0x8436)
DAC 3 Output Level
RC[7:0]
Bits 7–0
This register determines the output of DAC 3. The full-scale output is determined by bit 5 of the
DAC Config, OSD Contrast & DC Offset Register (0x8438).
DAC 4 Output Level:
DAC4CTRL (0x8437)
DAC 4 Output Level
BA[7:0]
Bits 7–0
This register determines the output of DAC 4. The output of this DAC can be scaled and mixed
with the outputs of DACs 1–3 as determined by bit 6 of the DAC Config, OSD Contrast & DC
Offset Register.
DAC Config, OSD Contrast & DC Offset:
DACOSDDCOFF (0x8438)
DAC Options
OSD Contrast
DCF[1:0]
Res’d
X
DC Offset
DC[2:0]
OSD[1:0]
Bits 2–0
Bits 4–3
These determine the DC offset of the three video outputs, blue, red and green.
These determine the contrast of the internally generated OSD.
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