參數(shù)資料
型號: LH79533
英文描述: ARM RISC CORE ASSPs ARM7TDMI
中文描述: ARM的RISC核心專用標準的ARM7TDMI
文件頁數(shù): 28/39頁
文件大?。?/td> 296K
代理商: LH79533
LH79520
System-on-Chip
28
8/21/02
Preliminary Data Sheet
Figure 12. External Static Memory Read, One Wait State
Figure 13. External Static Memory Read, Two Wait States
79520-31
HCLK
ADDRESS
DATA
A[25:0]
D[31:0]
nCSx
nOE
tOVOE
tOVCS
tISD
tOHA
tIHD
tOHCS
tOHOE
tOVA
1 WAIT STATE
DATA READ
NOTE:
All signal transitions are measured from the
50% point of the clock to the 50% point of the signal.
79520-32
HCLK
ADDRESS
DATA
A[25:0]
D[31:0]
nCSx
nOE
t
OHA
t
OHOE
t
OHCS
t
IHD
t
ISD
2 WAIT STATES
DATA READ
tOVOE
tOVCS
tOVA
NOTE:
All signal transitions are measured from the
50% point of the clock to the 50% point of the signal.
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