參數(shù)資料
型號： LH28F032SUTD-70
英文描述： x8/x16 Flash EEPROM Module
中文描述： x8/x16閃存EEPROM模塊
文件頁數(shù)： 31/56頁
文件大?。?/td> 373K
代理商： LH28F032SUTD-70
LH28F160S5-L/S5H-L
- 31 -
Set Block Lock-Bit
Complete
Start
Write 60H,
Block Address
Write 01H,
Block Address
Read
Status Register
0
SR.7 =
1
Full Status
Check if Desired
Repeat for subsequent block lock-bit set operations.
Full status check can be done after each block lock-bit set
operation or after a sequence of block lock-bit set operations.
Write FFH after the last block lock-bit set operation to place
device in read array mode.
BUS
OPERATION
Write
Write
Read
Standby
COMMAND
Set Block
Lock-Bit
Setup
COMMENTS
Data = 60H
Addr = Block Address
Data = 01H
Addr = Block Address
Status Register Data
Check SR.7
1 = WSM Ready
0 = WSM Busy
SR.3 =
FULL STATUS CHECK PROCEDURE
Read Status Register
Data (See Above)
V
PP
Range Error
1
0
SR.1 =
Device Protect Error
1
0
BUS
OPERATION
COMMAND
COMMENTS
Standby
Standby
Check SR.1
1 = Device Protect Detect
WP# = V
IL
Check SR.4
1 = Set Block Lock-Bit Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the Clear
Status Register command in cases where multiple block
lock-bits are set before full status is checked.
If error is detected, clear the status register before attempting
retry or other error recovery.
Set Block
Lock-Bit
Confirm
Set Block Lock-Bit
Successful
SR.4, 5 =
Command Sequence
Error
1
0
SR.4 =
Set Block Lock-Bit
Error
1
0
Standby
Check SR.3
1 = V
PP
Error Detect
Standby
Check SR.4, 5
Both 1 = Command Sequence Error
Fig. 10 Set Block Lock-Bit Flowchart
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