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參數(shù)資料
| 型號： | LH28F032SUTD-70 |
| 英文描述： | x8/x16 Flash EEPROM Module |
| 中文描述： | x8/x16閃存EEPROM模塊 |
| 文件頁數(shù)： | 27/56頁 |
| 文件大?。?/td> | 373K |
| 代理商： | LH28F032SUTD-70 |
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LH28F160S5-L/S5H-L
- 27 -
Start
Write E8H,
Start Address
Read
Status Register
0
XSR.7 =
1
Write Word or Byte Count (N)_1,
Start Address
Write Buffer Data,
Start Address
X = 0
Write Buffer Data,
Device Address
NOTES :
1. Byte or word count values on DQ
0-7
are loaded into the
count register.
2. Write buffer contents will be programmed at the start
address.
3. Align the start address on a write buffer boundary for
maximum programming performance.
4. The device aborts the Multi Word/Byte Write command
if the current address is outside of the original block address.
5. The status register indicates an "improper command
sequence" if the Multi Word/Byte Write command is aborted.
Follow this with a Clear Status Register command.
SR full status check can be done after each multi word/byte
write or after a sequence of multi word/byte writes.
Write FFH after the last multi word/byte write operation to
place device in read array mode.
BUS
OPERATION
Write
Read
Standby
Write
(NOTE 1)
COMMAND
Setup Multi
Word/Byte Write
COMMENTS
Data = E8H
Addr = Start Address
Data = Word or Byte Count (N)_1
Addr = Start Address
Write
(NOTE 2, 3)
Data = Buffer Data
Addr = Start Address
Write
(NOTE 4, 5)
Data = Buffer Data
Addr = Device Address
Write
Data = D0H
Addr = X
Read
Status Register Data
Standby
Extended Status Register Data
Check SR.7
1 = WSM Ready
0 = WSM Busy
Multi Word/Byte
Write Abort
Yes
No
No
X = N
No
Write Buffer
Time-Out
Yes
Full Status
Check if Desired
SR.7 =
Multi Word/Byte
Write Complete
0
1
X = X + 1
Write D0H
Read
Status Register
Yes
No
Yes
No
Suspend Multi Word/Byte
Write Loop
Suspend
Multi Word/Byte
Write
Write Another
Block Address
Check XSR.7
1 = Multi Word/Byte Write Ready
0 = Multi Word/Byte Write Busy
Yes
Abort
Buffer Write
Command
Another
Buffer
Write
Fig. 6 Automated Multi Word/Byte Write Flowchart
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