參數(shù)資料
型號(hào): LAN91C96IQFP
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: NON-PCI SINGLE-CHIP FULL DUPLES ETHERNET CONTROLLER
中文描述: 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: QFP-100
文件頁(yè)數(shù): 7/110頁(yè)
文件大?。?/td> 655K
代理商: LAN91C96IQFP
Non-PCI Single-Chip Full Duplex Ethernet Controller
SMSC DS – LAN91C96I
Page 7
Rev. 11/18/2004
DATASHEET
Chapter 2
Overview
A unique architecture allows the LAN91C96I to combine high performance, flexibility, high integration and
simple software interface.
The LAN91C96I incorporates the LAN91C92 functionality for Local Bus environments. The LAN91C96I
consists of the same logical I/O register structure in Local Bus modes. The MMU (Memory Management
Unit) architecture used by the LAN91C96I combines the simplicity and low overhead of fixed areas with
the flexibility of linked lists providing improved performance over other methods.
Packet reception and transmission are determined by memory availability. All other resources are always
available if memory is available. To complement this flexible architecture, bus interface functions are
incorporated in the LAN91C96I, as well as a 6144 byte packet RAM - and serial EEPROM-based setup.
The user can select or modify configuration choices. The LAN91C96I integrates most of the 802.3
functionality, incorporating the MAC layer protocol, the physical layer encoding and decoding functions
with the ability to handle the AUI interface. For twisted pair networks, LAN91C96I integrates the twisted
pair transceiver as well as the link integrity test functions.
The LAN91C96I is a true 10BASE-T single chip device able to interface to a system or a local bus.
Support for direct-driven LEDs for installation and run-time diagnostics is provided. 802.3 statistics are
gathered to facilitate network management.
The LAN91C96I is a single chip Ethernet controller designed to be 100% pin and software compatible with the
LAN91C92 and LAN91C94 in Local Bus mode.
The LAN91C96I has been designed to support full duplex switched Ethernet and provides Fully independent
transmit and receive operations.
The LAN91C96I internal packet memory is extended to 6k bytes, and the MMU will continue to manage
memory in 256 byte pages. The increase in memory size accommodates the potential for simultaneous
transmit and receive traffic in some full duplex applications as well as support for enhanced performance on
systems that introduce increased latency.
The LAN91C96I has the ability to retrieve configuration information from a serial EEPROM on reset or power-
up. In Local Bus mode, the serial EEPROM acts as storage of configuration and IEEE Ethernet address
information compatible with the existing LAN91C90, LAN91C92, and LAN91C94 Local Bus Ethernet
controllers. External Flash ROM is required for CIS storage.
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