參數(shù)資料
型號(hào): LAN91C96IQFP
廠商: STANDARD MICROSYSTEMS CORP
元件分類: 微控制器/微處理器
英文描述: NON-PCI SINGLE-CHIP FULL DUPLES ETHERNET CONTROLLER
中文描述: 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: QFP-100
文件頁(yè)數(shù): 49/110頁(yè)
文件大?。?/td> 655K
代理商: LAN91C96IQFP
Non-PCI Single-Chip Full Duplex Ethernet Controller
SMSC DS – LAN91C96I
Page 49
Rev.
11/18/2004
DATASHEET
I/O SPACE - BANK2
OFFSET
2
NAME
TYPE
SYMBOL
PNR
PACKET NUMBER REGISTER
READ/WRITE
RESERVED
0
PACKET NUMBER AT TX AREA
0
0
0
0
0
0
0
PACKET NUMBER AT TX AREA - The value written into this register determines which packet number is
accessible through the TX area. Some MMU commands use the number stored in this register as the
packet number parameter. This register is cleared by a RESET or a RESET MMU Command.
RESERVED – This bit is reserved.
I/O SPACE - BANK2
OFFSET
3
NAME
TYPE
SYMBOL
ARR
ALLOCATION RESULT REGISTER
READ ONLY
This register is updated upon an ALLOCATE MEMORY MMU command.
FAILED
1
ALLOCATED PACKET NUMBER
0
0
0
0
0
0
0
FAILED - A ”0” indicates a successful allocation completion. If the allocation fails the bit is set and only
cleared when the pending allocation is satisfied. Defaults high upon reset and reset MMU command. For
polling purposes, the ALLOC_INT in the Interrupt Status Register should be used because it is
synchronized to the read operation.
Sequence:
1. Allocate Command
2. Poll ALLOC_INT bit until set
3. Read Allocation Result Register
ALLOCATED PACKET NUMBER - Packet number associated with the last memory allocation request.
The value is only valid if the FAILED bit is clear.
Note:
For software compatibility with future versions, the value read from the ARR after an allocation request is
intended to be written into the PNR as is, without masking higher bits (provided FAILED = “0”).
相關(guān)PDF資料
PDF描述
LAN91C96ITQFP NON-PCI SINGLE-CHIP FULL DUPLES ETHERNET CONTROLLER
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