參數(shù)資料
型號: L64780
廠商: LSI Corporation
英文描述: DVB-T COFDM Demodulator(對地數(shù)字視頻廣播 正交編碼頻率分割多路處理解調(diào)器)
中文描述: 的DVB - T COFDM解調(diào)器(對地數(shù)字視頻廣播正交編碼頻率分割多路處理解調(diào)器)
文件頁數(shù): 80/126頁
文件大?。?/td> 953K
代理商: L64780
4-28
Register Descriptions
TIM_OFFSET_MSB
Start Pulse Phase Offset (MSB)
The start pulse is a signal with a periodicity of every
FFT-MODE + GUARD 9 MHz cycles (in steady state).
The TIM_OFFSET bits adjust the phase of this signal in
the periodic window. The initial condition for these bits is
0x00.
R/W [5:0]
4.4.9 Address Lines 0x0F, 0x10
TIM_CLK_INIT
Timing Initial VCXO Offset
These two registers, TIM_CLK_INIT_LSB and
TIM_CLK_INIT_MSB, select the initial VCXO frequency
offset that is directed to the external VCXO.
R/W [7:0]
When this register is read, its value represents the actual
VCXO offset (for example, the content of the integrator)
recovered by the system.
When this register is written, this value reinitializes the
Integrator value.
Two OBC accesses are required to update these registers;
thus, you should first stall the Integrator by setting
TIM_STALL to 1, then update the values. The process can
be unfrozen by clearing TIM_STALL back to 0.
The initial condition for these bits is 0x00 (both registers
set to 0x00).
7
0
0x0F
TIM_CLK_INIT_LSB
0x10
TIM_CLK_INIT_MSB
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