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參數(shù)資料
| 型號： | L64780 |
| 廠商： | LSI Corporation |
| 英文描述： | DVB-T COFDM Demodulator(對地數(shù)字視頻廣播 正交編碼頻率分割多路處理解調(diào)器) |
| 中文描述： | 的DVB - T COFDM解調(diào)器（對地數(shù)字視頻廣播正交編碼頻率分割多路處理解調(diào)器） |
| 文件頁數(shù)： | 60/126頁 |
| 文件大?。?/td> | 953K |
| 代理商： | L64780 |
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4-8
Register Descriptions
The Sync change event is visible through the signal
SYNC CHANGE (see
Section 4.6, “Performance Monitor-
ing Registers Address Line 0x16”
) and occurs when at
least one of the following synchronizations has changed
during the demodulation:
The Frame_Sync_OK bit is set to 1 when the frame
synchronization is reached and reset to 0 when the
frame synchronization is lost. The Frame_Sync_OK
bit is visible through the Performance Monitoring
register.
The Freq_Sync_OK bit is set to 1 when the demodu-
lator is frequency locked and reset to 0 when the fre-
quency synchronization is not yet reached or lost. The
Freq_Sync_OK bit is visible through Performance
Monitoring Register 1.
The Start_Sync_OK bit is set to 1 when the timing
block has properly determined the start of the FFT; it
is reset to 0 when this is lost. Start_Sync_OK bit is
visible through Performance Monitoring Register 1.
The Clock_Sync_OK bit is set to 1 when the sampling
frequency is properly locked; it is reset to 0 when sync
is not reached. Clock_Sync_OK is visible through Per-
formance Monitoring register 1.
The TPS_Sync_OK bit is set to 1 when the TPS
frame is error free; it is reset to 0 when the frame is
corrupted. The TPS_Sync_OK bit is visible through
Performance Monitoring Register 1.
TPS_INFO_CHANGE
TPS Change Interrupt
A valid TPS structure has been received that differs from
the current mode of the DTTV demodulator. This interrupt
does not occur if the only change is in the frame number.
R 0
The TPS_INFO_CHANGE bit is initially reset to 0 (no
interrupt). If this bit is set to 1, an interrupt is generated.
The TPS_INFO_CHANGE bit is set to 1 only when the
received error-free (BCH-correct) TPS is different from
the last TPS information stored in the TPS registers. This
bit is only reset by a microprocessor read access. The
TPS_INFO_CHANGE bit is evaluated every COFDM
frame, and it is visible through the TPS_INFO_CHANGE
signal (see
Section 4.3, “TPS Registers”
).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| L64801GC-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
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