- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377598 > L64780 (LSI Corporation) DVB-T COFDM Demodulator(對(duì)地?cái)?shù)字視頻廣播 正交編碼頻率分割多路處理解調(diào)器) PDF資料下載
參數(shù)資料
| 型號(hào)： | L64780 |
| 廠商： | LSI Corporation |
| 英文描述： | DVB-T COFDM Demodulator(對(duì)地?cái)?shù)字視頻廣播 正交編碼頻率分割多路處理解調(diào)器) |
| 中文描述： | 的DVB - T COFDM解調(diào)器（對(duì)地?cái)?shù)字視頻廣播正交編碼頻率分割多路處理解調(diào)器） |
| 文件頁(yè)數(shù)： | 22/126頁(yè) |
| 文件大?。?/td> | 953K |
| 代理商： | L64780 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)當(dāng)前第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)
2-4
Architectural Overview
2.2 Analog-to-Digital Converter (ADC)
Features of the L64780 analog-to-digital converter include:
low-IF center frequency input: 4.57 MHz
input bandwidth: 8 MHz
sampling clock: 18.29 MHz
resolution: 8-bit
The L64780 also offers a 10-bit parallel port for connection to an
external, 10-bit ADC.
2.3 Automatic Gain Control (AGC)
The Tuner AGC Amplifier amplifies the signal. The resulting signal has
an RMS value of
. The AGC amplifies this signal so that its variance
allows the FFT to work properly. To do this, the input signal power must
be 10.95 dB down on the maximum ADC input range, normalized to 1.0.
This means the RMS value of the input to the L64780 is:
.
2.3.1 AGC Target RMS Value
Figure 2.2
defines The nine-bit AGC_TARGET register.
Figure 2.2
Structure of 9-Bit AGC_TARGET Register
For the FFT to perform correctly, the input level of the COFDM signal
must be 10.95 dB down on the normalized 1.0 Input Range. Thus, the
target RMS value,
σ
, of the input signal must be 0.283, as shown in
Equation 2.1.
Equation 2.1
σ
0
σ
0
0.283
=
σ
T
b
0
b
1
b
2
b
3
b
4
b
5
b
6
b
7
b
8
2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
AGC_TARGET_MSB[5:0]
AGC_TARGET_LSB[5:0]
σ
T
512
2
π
--
σ
=
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| L652DU12RE | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
| L652DU12RF | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
| L652DU12RI | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
| L652DU12RK | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
| L652DU90RF | 128 Megabit (16 M x 8-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileIO⑩ Control |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L64781 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Chip COFDM Receiver |
| L64782 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:L64782 Single-Chip COFDM Receiver |
| L6480 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:The L6480, realized in analog mixed signal technology, is an advanced fully integrated solution suitable for driving two-phase bipolar stepper motors with microstepping. |
| L64801GC-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
| L64801GC-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。