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參數(shù)資料
| 型號： | L64734 |
| 廠商： | LSI CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Tuner and Satellite Receiver Chipset |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 29/48頁 |
| 文件大?。?/td> | 478K |
| 代理商： | L64734 |
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L64733/L64734 Tuner and Satellite Receiver Chipset
29
MODp, MODn Delay
Must assert MOD level within this time
period to ensure that the next PSOUT
period gives correct count. Delay is
with respect to rising edge of PSOUT
(previous count).
–
–
8.5
ns
PLLINp, PLLINn and
MODp, MODn Hold Time
With respect to rising edge of PSOUT.
This means that PSOUT need not
continue to be asserted after MOD has
given correct count.
0
–
–
ns
Local Oscillator
LO Tuning Range
543
–
1180
MHz
LO Phase Noise, Includ-
ing Doubler. Subject to
LC tank implementation.
1 kHz offset. Depends on PLL loop
gain.
–
55
–
dBc/
Hz
10 kHz offset. Depends on PLL loop
gain.
–
75
–
dBc/
Hz
100 kHz offset
–
95
–
dBc/
Hz
LO Buffer Frequency
Range when overdriven
by external LO
FDOUB = LOW
925
–
2175
MHz
LO Input Port VSWR
Over Band, when over-
driven by external LO
925 MHz < FLO < 2175 MHz. Assume
series resistors to TANKp and TANKn
pins
–
–
2:1
–
Required external LO
Input Power Range
Differential drive into TANKp, TANKn.
50
source.
15
–
5
dBm
1. x 1.5 harmonic rejection for FLO = 725 MHz.
2. The L63733 is available with the half-harmonic specification guaranteed to 38 dB typical. Contact your
LSI Logic sales representative for further information.
Table 4
AC Characteristics of the L64733 (Cont.)
Parameter
Condition
Min
Typ
Max
Units
(Sheet 3 of 3)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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| L64735GM-27 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| L64735GM-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| L64735NC-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
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