參數(shù)資料
型號(hào): L6470PD
廠商: STMICROELECTRONICS
元件分類: 運(yùn)動(dòng)控制電子
英文描述: STEPPER MOTOR CONTROLLER, 7 A, PDSO36
封裝: ROHS COMPLIANT, SSOP-36
文件頁(yè)數(shù): 20/61頁(yè)
文件大?。?/td> 703K
代理商: L6470PD
L6470
Functional description
Doc ID 16737 Rev 1
27/61
Switch input can used by GoUntil command as described in paragraph 9.2.9.
If the SW input is unused, it should be connected to VDD.
Figure 10.
External switch connection
6.14
Programmable DMOS slew-rate, dead-time and blanking-time
Using CONFIG register POW_SR parameter, it is possible to set the commutation speed of
the power bridges output (see Table 18, paragraph 9.1.21).
6.15
Integrated analog to digital converter
The L6470 integrates a NADC bit ramp-compare analog to digital converter with a reference
voltage equal to VREG. The analog to digital converter input is available through the ADCIN
pin and the conversion result is available in the ADC_OUT register (see paragraph 9.1.16).
Sampling frequency is equal to the programmed PWM frequency.
The ADC_OUT value can be used for motor supply voltage compensation or can be at user
disposal.
6.16
Internal voltage regulator
The L6470 integrates a voltage regulator which generates a 3 V voltage starting from motor
power supply (VSA and VSB). In order to make the voltage regulator stable, at least 22 F
should be connected between VREG pin and ground (suggested value is 47 F).
The internal voltage regulator can be used to supply the VDD pin in order to make the
device digital output range 3.3 V compatible (Figure 11). A digital output range 5 V
compatible can be obtained connecting VDD pin to an external 5 V voltage source. In both
cases, a 10 F capacitance should be connected to VDD pin in order to obtain a correct
operation.
The internal voltage regulator is able to supply a current up to IREG,MAX, internal logic
consumption included (Ilogic). When the device is in standby mode the maximum current
that can be supplied is IREG, STBY, internal consumption included (Ilogic, STBY).
If an external 3.3 V regulated voltage is available, it can be applied to the VREG pin in order
to supply all the internal logic and avoiding power dissipation of the internal 3 V voltage
regulator (Figure 11).
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