參數(shù)資料
型號(hào): KM4132G271BQ(R)-7
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL
中文描述: 128K的x 32位× 2銀行同步圖形RAM的LVTTL
文件頁數(shù): 27/51頁
文件大?。?/td> 1033K
代理商: KM4132G271BQ(R)-7
KM4132G271B
CMOS SGRAM
- 27
Rev. 2.4 (May 1998)
I/O(=DQ)
31 24
Blue
1 1 0 0 0 0 1 1
23 16
Green
1 1 1 0 0 0 0 1
15 8
Yellow
0 0 0 0 1 1 1 1
7 0
Red
1 0 1 0 0 0 1 1
Color Register
DQMi
DQM
3
=0
DQM
2
=0
DQM
1
=0
DQM
0
=1
Mask Register
1 1 1 1 1 1 1 1
Yellow
0 0 0 0 1 1 1 1
1 1 0 1 1 1 0 1
Yellow
0 0 0 0 1 1 1 1
0 1 0 0 0 0 1 0
Green
1 1 1 0 0 0 0 1
0 1 1 1 0 1 1 0
White
0 0 0 0 0 0 0 0
Before Write
After Write
Blue
1 1 0 0 0 0 1 1
Blue
1 1 0 0 0 0 1 1
Red
1 0 1 0 0 0 1 1
White
0 0 0 0 0 0 0 0
(Continued)
Pixel and I/O masking : By Mask at Write Per Bit Mode, the selected bit planes keep the original data.
By Pixel Data issued through DQ pin, the selected pixels keep the original data.
See PIXEL TO DQ MAPPING TABLE.
Assume 8bpp,
White = "0000,0000", Red="1010,0011", Green ="1110,0001", Yellow ="0000,1111", Blue ="1100,0011"
i) STEP
¨
SMRS(LCR) : Load color(for 8bpp, through x 32 DQ color0-3 are loaded into color registers)
Load(color3, color2, color1, color0) = (Blue, Green, Yellow, Red)
= "1100,0011,1110,0001,0000,1111,1010,0011"
¨è
SMRS(LMR ): Load mask. Mask[31-0] ="1111,1111,1101,1101, 0100,0010,0111,0110"
--> Byte 3 : No I/O Masking ; Byte 2 : I/O Masking ; Byte 1 : I/O and Pixel Masking ; Byte 0 : DQM Byte Maskin g
¨é
Row Active with DSF "H" : I/O Mask by Write Per Bit Mode Enable
¨ê
Block Write with DQ[31-0] = "0111,0111,1111,1111,0101,0101,1110,1110" (Pixel Mask)
i) ILLUSTRATION
Note 2
Note 1
I/O(=DQ)
DQMi
31 24
DQM
3
=0
23 16
DQM
2
=0
15 8
DQM
1
=0
7 0
DQM
0
=1
Color Register
Color3=Blue
Yellow DQ
24
=H
Yellow DQ
25
=H
Yellow DQ
26
=H
Yellow DQ
27
=L
Color2=Green
Yellow DQ
16
=H
Yellow DQ
17
=H
Yellow DQ
18
=H
Yellow DQ
19
=H
Color1=Yellow
Green DQ
8
=H
Green DQ
9
=L
Green DQ
10
=H
Green DQ
11
=L
Color0=Red
White DQ
0
=L
White DQ
1
=H
White DQ
2
=H
White DQ
3
=H
Before
Block
Write
&
DQ
(Pixel
data)
000
001
010
011
100
101
110
111
Yellow DQ
28
=H
Yellow DQ
29
=H
Yellow DQ
30
=H
Yellow DQ
31
=L
Yellow DQ
20
=H
Yellow DQ
21
=H
Yellow DQ
22
=H
Yellow DQ
23
=H
Green DQ
12
=H
Green DQ
13
=L
Green DQ
14
=H
Green DQ
15
=L
White DQ
4
=L
White DQ
5
=H
White DQ
6
=H
White DQ
7
=H
After
Block
Write
000
001
010
011
Blue
Blue
Blue
Yellow
Blue
Blue
Blue
Blue
Red
Green
Red
Green
White
White
White
White
100
101
110
111
Blue
Blue
Blue
Yellow
Blue
Blue
Blue
Blue
Red
Green
Red
Green
White
White
White
White
*Note :
1. DQM byte masking.
2. At normal write, ONE column is selected among columns decorded by A
2-0
(000-111).
At block write, instead of ignored address A
2-0
, DQ
0-31
control each pixel.
PIXEL MASK
I/O MASK
PIXEL & I/O MASK
BYTE MASK
Note 1
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