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參數(shù)資料
| 型號(hào)： | KM29N040IT |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 512K x 8 Bit NAND Flash Memory(512K x 8位 NAND閃速存儲(chǔ)器) |
| 中文描述： | 為512k × 8位NAND閃存（為512k × 8位的NAND閃速存儲(chǔ)器） |
| 文件頁數(shù)： | 9/21頁 |
| 文件大?。?/td> | 218K |
| 代理商： | KM29N040IT |
KM29N040T, KM29N040IT
FLASH MEMORY
9
Identifying Invalid Block(s) in the KM29N040
INVALID BLOCKS
The KM29N040 Flash device may or may not contain up to 3 invalid blocks. Invalid blocks are defined as blocks that contain one o r
more invalid bits. Typically, an invalid block will contain a single bad bit. Devices with invalid block(s) have the same qualit y levels as
devices with all valid blocks and have the same AC and DC characteristics. An invalid block(s) does not affect the performance o f
valid block(s) because it is isolated from the bit line and the common source line by a select transistor. The system design mus t be
able to mask out the invalid block(s) via address mapping. The 1st block of the KM29N040, however, is fully guaranteed to be a g ood
block.
KM29N040 Technical Notes
All device locations are erased(FFh) prior to shipping. Device with invalid Block(s) will be randomly written with 00h data with in the
first or second page in the invalid Block(s). This page may or may not contain the invalid cell(s). The 00h data just marks the block(s)
that contains the invalid cell(s). A system that can utilize these devices must be able to recognize invalid block(s) via the fo llowing
suggested flow chart
(Figure 1).
Figure 1. Flow chart to create invalid block table.
Start
Set : Block = 0
Check "FF"
Set : Block n + 1
Block = 127
End
Create (or update)
invalid block(s) Table
No
No
Yes
Yes
*
For the 1st frame of 1st page
*
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