
Functional Description and Application Information
S12S Debug (S12SDBGV1) Module
MM912F634
Freescale Semiconductor
233
4.31.4.2.1
Exact Address Comparator Match (Comparators A and C)
With range comparisons disabled, the match condition is an exact equivalence of address/data bus with the value stored in the
comparator address/data registers. Further qualification of the type of access (R/W, word/byte) is possible.
Comparators A and C do not feature SZE or SZ control bits, thus the access size is not compared. The exact address is
compared, thus with the comparator address register loaded with address (n) a word access of address (n–1) also accesses (n)
but does not cause a match.
Table 310 lists access considerations without data bus compare.
Table 309 lists access
considerations with data bus comparison. To compare byte accesses DBGADH must be loaded with the data byte and the low
byte must be masked out using the DBGADLM mask register. On word accesses the data byte of the lower address is mapped
to DBGADH.
Comparator A features an NDB control bit to determine if a match occurs when the data bus differs to comparator register
contents, or when the data bus is equivalent to the comparator register contents.
4.31.4.2.2
Exact Address Comparator Match (Comparator B)
Comparator B features SZ and SZE control bits. If SZE is clear, then the comparator address match qualification functions the
same as for comparators A and C.
If the SZE bit is set the access size (word or byte) is compared with the SZ bit value such that only the specified type of access
causes a match. Thus if configured for a byte access of a particular address, a word access covering the same address does not
lead to match.
Table 309. Comparator A Data Bus Considerations
Access
Address
DBGADH
DBGADL
DBGADHM
DBGADLM
Example Valid Match
Word
ADDR[n]
Data[n]
Data[n+1]
$FF
MOVW #$WORD ADDR[n]
Byte
ADDR[n]
Data[n]
x
$FF
$00
MOVB #$BYTE ADDR[n]
Word
ADDR[n]
Data[n]
x
$FF
$00
MOVW #$WORD ADDR[n]
Word
ADDR[n]
x
Data[n+1]
$00
$FF
MOVW #$WORD ADDR[n]
Table 310. Comparator Access Size Considerations
Comparator
Address
SZE
SZ8
Condition For Valid Match
Comparators
A and C
ADDR[n]
—
Word and byte accesses of ADDR[n]
(185)MOVB #$BYTE ADDR[n]
MOVW #$WORD ADDR[n]
Comparator B
ADDR[n]
0
X
Word and byte accesses of ADDR[n]
(185)MOVB #$BYTE ADDR[n]
MOVW #$WORD ADDR[n]
Comparator B
ADDR[n]
1
0
MOVW #$WORD ADDR[n]
Comparator B
ADDR[n]
1
Byte accesses of ADDR[n]
MOVB #$BYTE ADDR[n]
Note:
185. A word access of ADDR[n-1] also accesses ADDR[n] but does not generate a match. The comparator address
register must contain the exact address used in the code.