參數(shù)資料
型號: KFH1G16Q2M-DID
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: FLASH MEMORY
中文描述: 閃存
文件頁數(shù): 46/93頁
文件大小: 1219K
代理商: KFH1G16Q2M-DID
OneNAND512/OneNAND1GDDP
FLASH MEMORY
46
Write Protection
Write Protection for BootRAM
At system power-up, the voltage detector in the device detects the rising edge of Vcc and releases the internal power-up reset signal
which triggers bootcode loading. And the designated size data(1KB) is copied from the beginning of the memory to the BootRAM.
After the bootcode loading is completed, the BootRAM is always locked to protect the significant boot code from the accidental write.
Write Protection for NAND Flash array
Write Protection Modes
The device offers both hardware and software write protection features for NAND Flash array. The software write protection feature is
used by writing Lock command or Lock-tight command to command register;The 002Ah or 002Ch command is written into F220h
register. And the hardware write protection feature is used by executing cold or warm reset. The default state is locked, and all NAND
Flash array goes to locked state after cold or warm reset.
Write Protection Commands
The instant secured block protects code and data by allowing blocks to be locked or lock-tighten. The write protection scheme offers
two levels of protection. The first allows software-only control of write protection(useful for frequently changed data blocks), while the
second requires hardware interaction before locking can be changed(protects infrequently changed code blocks).
The followings summarize the locking functionality
> All blocks power-up in a locked state. Unlock commands can unlock these blocks.
>The lock-tight command makes locked block(s) lock-tighten block(s). And lock-tight state can be returned to lock state only
when cold or warm reset is asserted.
> Lock-tighten blocks offer the user an additional level of write protection beyond that of a regular locked block.
Lock-tighten block can’t have it’s state changed by software, it can be changed by warm reset or cold reset.
> Unlock start and end block address are reflected immediately to the device only when the unlock command is issued, and
NAND Flash write protection status register is also updated at that time.
> Unlocked blocks can be programmed or erased.
> Only one consecutive area can be released to unlock state from lock state, i.e unlocking multi area is not available.
> Partial block lock (a range) is not available, i.e lock operation is only available for all blocks.
Write Protection Status
The device current Write Protection status can be read in NAND Flash Write Protection Status Register(F24Eh). There are three bits
- US, LS, LTS -, which are not cleared by hot reset. These Write Protection status registers are updated when Write Protection com-
mand is entered.
The followings summarize locking status.
example1)
In default, [2:0] values are 010.
-> If host executes unlock block operation, then [2:0] values turn to 110.
-> If host executes lock-tight block operation, then [2:0] values turn to 101.
example2)
If host executes lock block operation, then [2:0] values turn to 010.
-> If host executes lock-tight block operation, then [2:0] values turn to 001.
-> If cold or warm reset is entered, then [2:0] values turn to 010.
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