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參數(shù)資料
| 型號(hào)： | ITF86182SK8T |
| 廠商： | INTERSIL CORP |
| 元件分類： | 功率晶體管 |
| 英文描述： | 11A, 30V, 0.0115 Ohm, P-Channel, Logic Level, Power MOSFET |
| 中文描述： | 30 V, 0.0175 ohm, P-CHANNEL, Si, POWER, MOSFET, MS-012AA |
| 封裝： | PLASTIC, SO-8 |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 174K |
| 代理商： | ITF86182SK8T |
6
Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, T
JM
, and the
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, P
DM
, in an
application. Therefore the application’s ambient temperature,
T
A
(
o
C), and thermal resistance R
θ
JA
(
o
C/W) must be
reviewed to ensure that T
JM
is never exceeded. Equation 1
mathematically represents the relationship and serves as
the basis for establishing the rating of the part.
In using surface mount devices such as the SO8 package,
the environment in which it is applied will have a significant
influence on the part’s current and maximum power
dissipation ratings. Precise determination of P
DM
is complex
and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
Test Circuits and Waveforms
FIGURE 16. GATE CHARGE TEST CIRCUIT
FIGURE 17. GATE CHARGE WAVEFORMS
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. SWITCHING TIME WAVEFORM
R
L
V
GS
+
-
V
DS
V
DD
DUT
I
g(REF)
V
DD
Q
g(TH)
V
GS
= -1V
Q
g(-5)
V
GS
= -5V
Q
g(TOT)
V
GS
= -10V
V
DS
-V
GS
I
g(REF)
0
0
Q
gs
Q
gd
R
GS
R
L
DUT
-V
GS
0V
+
-
V
GS
V
DS
t
d(ON)
t
r
90%
10%
V
DS
90%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
t
ON
10%
0
(EQ. 1)
PDM
θ
JA
–
(
------------------------------
)
=
ITF86182SK8T
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