參數(shù)資料
型號(hào)： ISP1561BM,557
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝： 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-420-1, LQFP-128
文件頁數(shù)： 9/103頁
文件大小： 457K
代理商： ISP1561BM,557
ISP1561_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 5 March 2007
13 of 103
NXP Semiconductors
ISP1561
HS USB PCI Host Controller
8.1.2 PCI initiator and target
A PCI initiator initiates PCI transactions to the PCI bus. A PCI target responds to PCI
transactions as a slave. In the ISP1561, the two open Host Controllers and the enhanced
Host Controller function as both initiators or targets of PCI transactions issued by the host
CPU.
All USB Host Controllers have their own operational registers that can be accessed by the
system driver software. Drivers use these registers to congure the Host Controller
hardware system, issue commands to it and/or monitor the status of the current hardware
operation. The Host Controller plays the role of a PCI target. All operational registers of
the Host Controllers are the PCI transaction targets of the CPU.
Normal USB transfers require the Host Controller to access system memory elds, which
are allocated by USB HCDs and PCI drivers. The Host Controller hardware interacts with
the HCD by accessing these buffers. The Host Controller works as an initiator in this case,
and becomes a PCI master.
8.2 PCI conguration registers
OHCI USB Host Controllers and the EHCI USB Host Controller contain two sets of
software-accessible hardware registers: PCI conguration registers and memory-mapped
Host Controller registers.
A set of conguration registers is implemented for each of the three PCI functions of the
ISP1561, see Table 3.
Remark: In addition to the normal PCI header (from offset index 00h to 3Fh),
implementation-specic registers are dened to support power management and
function-specic features.
Table 3.
PCI conguration space registers of OHCI1, OHCI2 and EHCI
Address
(Hex)
Bits 31 to 24
Bits 23 to 16
Bits 15 to 8
Bits 7 to 0
Reset Hex Value[1]
Func0 OHCI1 Func1 OHCI2 Func2 EHCI
00
DID[15:0]
VID[15:0]
1561 1131
1562 1131
04
Status[15:0]
Command[15:0]
0210 0000
08
Class Code[23:0]
REVID[7:0]
0C03 1030
0C03 2030
0C
BIST[7:0]
Header
Type[7:0]
LT[7:0]
CLS[7:0]
0080 0000
10
BAR0[31:0]
0000 0000
0000 0000
14
Base Address Register 1, 2, 3, 4, 5 (Not congurable to
prevent setting by the driver)
0000 0000
18
1C
20
24
28
Cardbus CIS Pointer[31:0]
0000 0000
2C
SID[15:0]
SVID[15:0]
1561 1131
1562 1131
30
Expansion ROM Base Address[31:0]
0000 0000
34
Reserved
CP[7:0]
0000 00DC
38
Reserved
0000 0000
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