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參數(shù)資料
| 型號： | IS80C286-20 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 48/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CPU 16BIT 5V 20MHZ 68-PLCC |
| 標(biāo)準(zhǔn)包裝： | 18 |
| 處理器類型： | 80C286 16-位 |
| 速度： | 20MHz |
| 電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 68-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 68-PLCC（24.23x24.23） |
| 包裝： | 管件 |
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52
Real Address Mode Only
1. This is a protected mode instruction. Attempted execu-
tion in real address mode will result in an undefined
opcode exception (6).
2. A segment overrun exception (13) will occur if a word
operand references at offset FFFF(H) is attempted.
3. This instruction may be executed in real address mode to
initialize the CPU for protected mode.
4. The IOPL and NT fields will remain 0.
5. Processor extension segment overrun interrupt (9) will
occur if the operand exceeds the segment limit.
Either Mode
6. An exception may occur, depending on the value of the
operand.
7. LOCK is automatically asserted regardless of the pres-
ence or absence of the LOCK instruction prefix.
8. LOCK does not remain active between all operand
transfers.
Protected Virtual Address Mode Only
9. A general protection exception (13) will occur if the mem-
ory operand cannot be used due to either a segment limit
or access rights violation. If a stack segment limit is vio-
lated, a stack segment overrun exception (12) occurs.
10. For segment load operations, the CPL, RPL and DPL
must agree with privilege rules to avoid an exception.
The segment must be present to avoid a not-present
exception (11). If the SS register is the destination and a
segment not-present violation occurs, a stack exception
(12) occurs.
11. All segment descriptor accesses in the GDT or LDT made
by this instruction will automatically assert LOCK to main-
tain descriptor integrity in multiprocessor systems.
12. JMP, CALL, INT, RET, IRET instructions referring to
another code segment will cause a general protection
exception (13) if any privilege rule is violated.
13. A general protection exception (13) occurs if CPL
≠ 0.
14. A general protection exception (13) occurs if CPL > IOPL.
15. The IF field of the flag word is not updated if CPL > IOPL.
The IOPL field is updated only if CPL = 0.
16. Any violation of privilege rules as applied to the selector
operand does not cause a protection exception; rather,
the instruction does not return a result and the zero flag
is cleared.
17. If the starting address of the memory operand violates a
segment limit, or an invalid access is attempted, a gen-
eral protection exception (13) will occur before the ESC
instruction is executed. A stack segment overrun excep-
tion (12) will occur if the stack limit is violated by the
operand’s starting address. If a segment limit is violated
during an attempted data transfer then a processor
extension segment overrun exception (9) occurs.
18. The destination of an INT, JMP, CALL, RET or IRET
instruction must be in the defined limit of a code segment
or a general protection exception (13) will occur.
80C286 Instruction Set Summary
FUNCTION
FORMAT
CLOCK COUNT
COMMENTS
REAL
ADDRES
S
MODE
PRO-
TECTED
VIRTUAL
ADDRESS
MODE
REAL
ADDRES
S
MODE
PRO-
TECTED
VIRTUAL
ADDRESS
MODE
DATA TRANSFER
MOV = Move
Register to Register/Mem-
ory
1000100w mod
reg
r/m
2, 3
(Note 59)
2, 3
(Note 59)
29
Register/Memory to Regis-
ter
1000101w mod
reg
r/m
2, 5
(Note 59)
2, 5
(Note 59)
29
Immediate to Register/Mem-
ory
1100011w
mod 000
r/m
data
data if
w = 1
2, 3
(Note 59)
2, 3
(Note 59)
29
Immediate to Register
1011w reg data
data if w =
1
22
Memory to Accumulator
1010000w addr-low
addr-high
5
2
9
80C286
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