參數(shù)資料
型號(hào): IS80C286-20
廠商: Intersil
文件頁數(shù): 43/60頁
文件大?。?/td> 0K
描述: IC CPU 16BIT 5V 20MHZ 68-PLCC
標(biāo)準(zhǔn)包裝: 18
處理器類型: 80C286 16-位
速度: 20MHz
電壓: 5V
安裝類型: 表面貼裝
封裝/外殼: 68-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 68-PLCC(24.23x24.23)
包裝: 管件
48
FIGURE 35. 80C286 ASYNCHRONOUS INPUT SIGNAL TIMING
NOTES:
45. PCLK indicates which processor cycle phase will occur on the
next CLK, PCLK may not indicate the correct phase until the first
cycle is performed.
46. These inputs are asynchronous. The setup and hold times
shown assure recognition for testing purposes.
FIGURE 36. 80C286 RESET INPUT TIMING AND SUBSEQUENT
PROCESSOR CYCLE PHASE
NOTE:
47. When RESET meets the setup time shown, the next CLK will
start or repeat
φ1 of a processor cycle.
Waveforms (Continued)
19
5
4
5
4
BUS CYCLE TYPE
CLK
VCH
VCL
PCLK
(SEE NOTE 47)
INTR, NMI
HOLD, PEREQ
(SEE NOTE 45)
ERROR, BUSY
(SEE NOTE 46)
TX
φ2
φ1
CLK
VCH
VCL
TX
φ1
φ2
φ1
φ2
7
6
7
6
RESET
CLK
RESET
VCH
VCL
TX
φ1
φ2
(SEE NOTE 47)
80C286
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