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| 型號(hào)： | IS42S83200A |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 256 Mb Synchronous DRAM |
| 中文描述： | 256 MB的同步DRAM |
| 文件頁(yè)數(shù)： | 15/49頁(yè) |
| 文件大?。?/td> | 603K |
| 代理商： | IS42S83200A |
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Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. D
11/01/05
15
ISSI
IS42S83200A
(4-bank x 8,388,608 - word x 8-bit)
IS42S16160A
(4-bank x 4,194,304 - word x 16-bit)
OPERATIONAL DESCRIPTION
BANK ACTIVATE
The SDRAM has four independent banks. Each bank
is activated by the ACT command with the bank ad-
dresses (BA0,1). A row is indicated by the row ad-
dresses A0-12. The minimum activation interval be-
tween one bank and the other bank is tRRD.Multiple
banks can be active state concurrently by issuing mul-
tiple ACT commands.
PRECHARGE
The PRE command deactivates the bank indicated
by BA0,1. When multiple banks are active, the
precharge all command (PREA, PRE + A10=H) is
available to deactivate them at the same time.
After tRP from the precharge, an ACT command to the
same bank can be issued.BA0-1 are
“DON’T CARE”
in this case.
READ
After tRCD from the bank activation, a READ
command can be issued. 1st output data is avail-
able after the /CAS Latency from the READ, fol-
lowed by (BL -1) consecutive data when the Burst
Length is BL. The start address is specified by
A0-9(X8), A0-8(X16) , and the ad
dress sequence of
burst data is defined by the
Burst Type.
A READ command may be applied
to any
active bank, so the row precharge time (tRP)
can be
hidden behind continuous output data by
interleaving the multiple banks. When A10 is high
at a READ command, the auto-precharge
(READA) is performed. Any command (READ,
WRITE, PRE, TBST, ACT) to the same bank is
inhibited till the internal precharge is complete.
The internal precharge starts at BL after READA.
The next ACT command can be issued after (BL
+ tRP) from the previous READA.
In any case, tRCD+BL
≥
tRASmin must be met.
Bank Activation and Precharge All (BL=4, CL=3)
CLK
Command
A0-9,11-12
A10
BA0-1
DQ
ACT
READ
ACT
PRE
ACT
Xa
Xb
Yb
Xa
1
Xa
Xb
0
00
01
01
00
Qb0
Qb1
Qb2
Qb3
tRRD
tRCD
tRP
Xa
Precharge All
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IS42S83200A-75T | 256 Mb Synchronous DRAM |
| IS42S83200A-75TL | 256 Mb Synchronous DRAM |
| IS42VS16100C1-10TLI | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16100C1 | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16100C1-10T | 512K Words x 16 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42S83200A-75T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256 Mb Synchronous DRAM |
| IS42S83200A-75TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256 Mb Synchronous DRAM |
| IS42S83200B | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256-MBIT SYNCHRONOUS DRAM |
| IS42S83200B-6T | 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M 3.3v 32Mx8 166MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
| IS42S83200B-6TL | 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 256M 3.3v 32Mx8 166MHz RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube |
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