參數(shù)資料
型號(hào): IS42S16800A1-7TL
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 8Meg x16 128-MBIT SYNCHRONOUS DRAM
中文描述: 8M X 16 SYNCHRONOUS DRAM, 7 ns, PDSO54
封裝: LEAD FREE, TSOP2-54
文件頁(yè)數(shù): 11/63頁(yè)
文件大?。?/td> 827K
代理商: IS42S16800A1-7TL
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev.
00
B
0
5/01
/06
11
ISSI
IS42S16800A1
Read Interrupted by a Write
To interrupt a burst read with a Write Command, DQM may be needed to place the DQs (output drivers) in a high impedance
state to avoid data contention on the DQ bus. If a Read Command will issue data on the first or second clocks cycles of the
write operation, DQM is needed to insure the DQs are tri-stated. After that point the Write Command will have control of the DQ
bus.
Minimum Read to Write Interval
COMMAND
NOP
NOP
READ A
WRITE A
NOP
NOP
NOP
DQM
DIN A
0
DIN A
1
DIN A
2
DIN A
3
: “H” or “L”
DIN A
0
DIN A
1
DIN A
2
DIN A
3
t
CK2
,
DQs
CAS latency = 2
t
CK3
,
DQs
CAS latency = 3
CK
T0
T2
T1
T3
T4
T5
T6
T7
T8
NOP
NOP
(Burst Length = 4, CAS latency = 2, 3)
DQM high for CAS latency = 2 only.
Required to mask first bit of READ data.
相關(guān)PDF資料
PDF描述
IS42S16800B-7TL 16Meg x 8, 8Meg x16 128-MBIT SYNCHRONOUS DRAM
IS42S16800B 16Meg x 8, 8Meg x16 128-MBIT SYNCHRONOUS DRAM
IS42S16800B-6T 16Meg x 8, 8Meg x16 128-MBIT SYNCHRONOUS DRAM
IS42S16800B-6TL 16Meg x 8, 8Meg x16 128-MBIT SYNCHRONOUS DRAM
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IS42S16800A-6T 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM
IS42S16800A-6TL 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM
IS42S16800A-7B 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM
IS42S16800A-7BI 制造商:ICSI 制造商全稱:Integrated Circuit Solution Inc 功能描述:16Meg x 8, 8Meg x16 & 4Meg x 32 128-MBIT SYNCHRONOUS DRAM
IS42S16800A-7BL 制造商:Integrated Silicon Solution Inc 功能描述: