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參數(shù)資料
| 型號(hào)： | Intel386 EX |
| 廠商： | Intel Corp. |
| 英文描述： | Highly Integrated, 32-Bit, Fully Static Embedded Micropocessor(32位高集成完全靜態(tài)嵌入式微處理器) |
| 中文描述： | 高度集成，32位，全靜態(tài)嵌入式Micropocessor（32位高集成完全靜態(tài)嵌入式微處理器） |
| 文件頁數(shù)： | 12/48頁 |
| 文件大?。?/td> | 515K |
| 代理商： | INTEL386 EX |
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Special Environment
Intel386 EX Embedded Processor
8
PRELIMINARY
DACK1:0#
O
DMA Acknowledge 1 and 0
signal to an external device that the processor has
acknowledged the corresponding DMA request and is relinquishing the bus.
DACK1# is multiplexed with TXD1, and DACK0# is multiplexed with CS5#.
Data/Control
indicates whether the current bus cycle is a data cycle (memory or
I/O read or write) or a control cycle (interrupt acknowledge, halt, or code fetch).
Data Carrier Detect SIO1 and SIO0
indicate that the modem or data set has
detected the corresponding asynchronous serial channel’s data carrier. DCD1# is
multiplexed with DRQ0, and DCD0# is multiplexed with P1.0.
DMA External Request 1 and 0
indicate that a peripheral requires DMA service.
DRQ1 is multiplexed with RXD1, and DRQ0 is multiplexed with DCD1#.
Data Set Ready SIO1 and SIO0
indicate that the modem or data set is ready to
establish a communication link with the corresponding asynchronous serial
channel. DSR1# is multiplexed with STXCLK, and DSR0# is multiplexed with
P1.3.
Data Terminal Ready SIO1 and SIO0
indicate that the corresponding
asynchronous serial channel is ready to establish a communication link with the
modem or data set. DTR1# is multiplexed with SRXCLK, and DTR0# is
multiplexed with P1.2.
End of Process
indicates that the processor has reached terminal count during a
DMA transfer. An external device can also pull this pin low. EOP# is multiplexed
with CTS1#.
Error
indicates that the math coprocessor has an error condition. ERROR# is
multiplexed with TMROUT2.
Float
forces all bidirectional and output signals except TDO to a high-impedance
state.
Bus Hold Acknowledge
indicates that the processor has surrendered control of
its local bus to another bus master. HLDA is multiplexed with P1.7.
Bus Hold Request
allows another bus master to request control of the local bus.
HLDA active indicates that bus control has been granted. HOLD is multiplexed
with P1.6.
Interrupt Requests
are maskable inputs that cause the CPU to suspend
execution of the current program and then execute an interrupt acknowledge
cycle. They are multiplexed as follows: INT7 with TMRGATE1, INT6 with
TMRCLK1, INT5 with TMRGATE0, INT4 with TMRCLK0, and INT3:0 with P3.5:2.
Local Bus Access
is asserted whenever the processor provides the READY#
signal to terminate a bus transaction. This occurs when an internal peripheral
address is accessed or when the chip-select unit provides the READY# signal.
Bus Lock
prevents other bus masters from gaining control of the system bus.
LOCK# is multiplexed with P1.5.
Memory/IO
Indicates whether the current bus cycle is a memory cycle or an I/O
cycle. When M/IO# is high, the bus cycle is a memory cycle; when M/IO# is low,
the bus cycle is an I/O cycle.
Next Address
requests address pipelining.
Nonmaskable Interrupt Request
is a non-maskable input that causes the CPU
to suspend execution of the current program and execute an interrupt
acknowledge cycle.
D/C#
O
DCD1:0#
I
DRQ1:0
I
DSR1:0#
I
DTR1:0#
O
EOP#
I/OD
ERROR#
I
FLT#
I
HLDA
O
HOLD
I
INT7:0
I
LBA#
O
LOCK#
O
M/IO#
O
NA#
NMI
I
ST
Table 3. Pin Descriptions
(Sheet 2 of 4)
Symbol
Type
Name and Function
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| INTEL386 SXSA | 5-V 32-Bit Fully Static Embedded Microprocessor(5V，32位完全靜態(tài)嵌入式微處理器) |
| intel386 SX | 32-Bit CPU With a 16-Bit External Data Bus And a 24-bit External Address Bus(帶16位內(nèi)部數(shù)據(jù)總線和24位內(nèi)部地址總線32位微處理器) |
| INTEL386 | Intel386 EX Embedded Microprocessor |
| Intel387 dx | DX Math Coprocessor(32位數(shù)學(xué)協(xié)處理器) |
| Intel387 sx | SX Math Coprocessor(32位數(shù)學(xué)協(xié)處理器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| INTEL386SX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:MICROPROCESSOR |
| INTEL387 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM SX MATH COPROCESSOR |
| INTEL387DX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Intel387 DX - MATH COPROCESSOR |
| INTEL387SX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387 SX - MATH COPROCESSOR |
| INTEL387TMDX | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Intel387TM DX MATH COPROCESSOR |
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