參數(shù)資料
型號： IDT82P2816BBG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 77/146頁
文件大?。?/td> 0K
描述： IC LINE INTERFACE UNIT 416-PBGA
標準包裝： 5
功能： 線路接口單元（LIU）
接口： E1，J1，T1
電路數(shù)： 1
電源電壓： 1.8V, 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 416-BGA
供應(yīng)商設(shè)備封裝： 416-PBGA（27x27）
包裝： 托盤
包括： 缺陷和警報檢測，驅(qū)動器過流檢測和保護，LLOS 檢測，PRBSARB / IB 檢測和生成
產(chǎn)品目錄頁面： 1259 (CN2011-ZH PDF)
其它名稱： 800-1702
82P2816BBG
IDT82P2816
16(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Functional Description
36
February 6, 2009
3.3.7
TRANSMITTER POWER DOWN
Set the T_OFF bit (b5, TCF0,...) to ‘1’ will power down the corre-
sponding transmitter.
In this way, the corresponding transmit circuit is turned off. The pins
on the transmit line interface (including TTIPn and TRINGn) will be in
High-Z state. The input on the transmit system interface (including TDn,
TDPn, TDNn and TCLK) is ignored. The output on the transmit system
interface (i.e. TMFn) will be in High-Z state.
After clearing the T_OFF bit (b5, TCF0,...), it will take 1 ms for the
transmitter to achieve steady state, i.e., return to the previous configura-
tion and performance.
3.3.8
OUTPUT HIGH-Z ON TTIP AND TRING
TTIPn and TRINGn can be set to High-Z state globally or on a per-
channel basis.
The following three conditions will set TTIPn and TRINGn to High-Z
state globally:
Connecting the OE pin to low;
Loss of MCLK (i.e., no transition on MCLK for more than 1 ms);
Power on reset, hardware reset by pulling RST to low for more
than 2 s or global software reset by writing the RST register.
The following six conditions will set TTIPn and TRINGn to High-Z
state on a per-channel basis:
Writing ‘0’ to the OE bit (b6, TCF0,...);
Loss of TCLKn in Transmit Single Rail NRZ Format mode or
Transmit Dual Rail NRZ Format mode (i.e., no transition on TCLKn
for more than 64 XCLK1 cycles) except that the channel is in
Remote Loopback or transmit internal pattern with XCLK;
Transmitter power down;
Per-channel software reset by writing ‘1’ to the CHRST bit (b1,
Setting the THZ_OC bit (b4, TCF0,...) to ‘1’ when transmit driver
over-current is detected.
1. XCLK is derived from MCLK. It is 1.544 MHz in T1/J1 mode or 2.048 MHz
in E1 mode.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT82P2821 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:21(+1) Channel High-Density T1/E1/J1 Line Interface Unit
IDT82P2821BH 功能描述:IC LIU T1/J1/E1 21+1CH 640-PBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標準包裝:750 系列:*
IDT82P2821BHG 功能描述:IC LINE INTERFACE UNIT 640-PBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標準包裝:750 系列:*
IDT82P2828 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:28(+1) Channel High-Density T1/E1/J1 Line Interface Unit
IDT82P2828BH 功能描述:IC LIU T1/J1/E1 28+1CH 640-PBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標準包裝:250 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR)
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