參數(shù)資料
型號: ICS9248YF-175LF-T
元件分類: 時鐘產(chǎn)生/分配
英文描述: 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48
封裝: 0.300 INCH, SSOP-48
文件頁數(shù): 1/13頁
文件大?。?/td> 355K
代理商: ICS9248YF-175LF-T
Integrated
Circuit
Systems, Inc.
ICS9248-175
Third party brands and names are the property of their respective owners.
Block Diagram
9248-175 Rev - 9/11/00
Advance Information
ADVANCE INFORMATION documents contain information on products
in the formative or design phase development. Characteristic data and
other specifications are design goals. ICS reserves the right to change or
discontinue these products without notice.
Functionality
Pin Configuration
48-Pin 300mil SSOP
Recommended Application:
VIA KX133 style chipset
Output Features:
1 - Differential pair open drain CPU clocks @ 3.3V
1 - Single-ended open drain CPU clock @ 3.3V
13 - SDRAM @ 3.3V
6 - PCI @3.3V,
1 - 48MHz, @3.3V fixed.
1 - 24/48MHz @ 3.3V
2 - REF @3.3V, 14.318MHz.
Features:
Up to 166MHz frequency support
Support power management: CPU stop and Power down
Mode from I
2C programming.
Spread spectrum for EMI control
(± 0.25% center spread).
Uses external 14.318MHz crystal
AMD - K7
System Clock Chip
*
Internal Pull-up Resistor of 120K to VDD
VDD
REF0/CPU_STOP#*
GND
X1
X2
VDD2
MODE*/PCICLK0
FS1*/PCICLK1
GND
PCICLK2
PCICLK3
PCICLK4
PCICLK5
VDD2
BUFFER_IN
GND
SDRAM11
SDRAM10
VDD3
SDRAM9
SDRAM8
GND
SDATA
SCLK
REF1/FS0*
GND
CPUCLKT1
GND
CPUCLKC0
CPUCLKT0
VDDA
PD#*
SDRAM_OUT
GND
SDRAM0
SDRAM1
VDD3
SDRAM2
SDRAM3
GND
SDRAM4
SDRAM5
VDD3
SDRAM6
SDRAM7
VDD4
48MHz/FS2*
24_48MHz/FS3*
ICS9248-175
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BUFFER IN
PLL2
PLL1
Spread
Spectrum
48MHz
24_48MHz
SDRAM (11:0)
PCICLK (5:0)
SDRAM_OUT
CPUCLKT (1:0)
CPUCLKC0
X1
X2
XTAL
OSC
CPU
DIVDER
PCI
DIVDER
Stop
SDATA
SCLK
FS (3:0)
PD#
CPU_STOP#
Control
Logic
Config.
Reg.
/ 2
REF (1:0)
SDRAM
DRIVER
3
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S
F1
S
F0
S
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