參數(shù)資料
型號: IBM25EMPPC750EBUB2660
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 266 MHz, RISC PROCESSOR, CBGA360
封裝: 25 X 25 MM, 1.27 MM PITCH, CERAMIC, BGA-360
文件頁數(shù): 8/43頁
文件大?。?/td> 431K
代理商: IBM25EMPPC750EBUB2660
Preliminary and subject to change without notice
PPC740 and PPC750 Hardware Specifications
16 of 43
3.1.2.5 L2 Bus Input AC Specications
The L2 bus input interface AC timing specications are found in Table 11 .
Notes:
1. All input specications are measured from the midpoint voltage (1.4V) of the signal in question to the
midpoint voltage of the rising edge of the input L2SYNC_IN. Input timings are measured at the pins
2. Rise and fall times for the L2SYNC_IN input are measured from 0.4 to 2.4V.
3. Guaranteed by design and characterization, and not tested.
Figure 7 shows the L2 bus input timing diagrams for the PPC750.
Figure 7. L2 Bus Input Timing Diagrams
Table 11. L2 Bus Input Interface AC Timing Specications1
Operating conditions are specied in Section Table 2., "Recommended Operating Conditions"
Num
Characteristic
Min
Max
Unit
Notes
29,30
L2SYNC_IN rise and fall time
1.0
ns
2,3
24
Data and parity input setup to L2SYNC_IN
2.0
ns
25
L2SYNC_IN to data and parity input hold
0.5
ns
VM
VM = Midpoint Voltage (1.4v)
L2SYNC_IN
25
24
ALL INPUTS
29
30
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