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參數(shù)資料
| 型號： | IBM043614PQKB |
| 廠商： | IBM Microeletronics |
| 英文描述： | 32K X 36 BURST SRAM(1M (32K X 36)同步可猝發(fā)高性能靜態(tài)RAM) |
| 中文描述： | 32KX8的36爆的SRAM（100萬（32KX8的36）同步可猝發(fā)高性能靜態(tài)內(nèi)存） |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 219K |
| 代理商： | IBM043614PQKB |
8190747
SA14-4652-03
Revised 9/97
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 13
IBM043614PQKB
32K X 36 BURST SRAM
Features
32K x 36 Organization
0.5
μ
CMOS Technology
Supports PowerPC
TM
Processor Operation
Single +3.3V
±
5% Power Supply and Ground
5V Tolerant I/O
LVTTL I/O Compatible
Fast OE times: 4, 5, 6ns
Common I/O
Registered Addresses, Data Ins and Control
Signals
Asynchronous Output Enable
Self-Timed Write Operation and Byte Write
Capability
Low Power Dissipation
- 960 mW Active at 66MHz
- 90 mW Standby
100 Pin Thin Quad Flat Pack
Description
IBM Microelectronics 1M SRAM is a Synchronous
Burstable, high performance CMOS Static RAM that
is versatile, wide I/O, and achieves 8 nsec access. A
single clock is used to initiate the read/write opera-
tion and all internal operations are self-timed. At the
rising edge of the Clock, all Addresses, Data Ins and
Control Signals are registered internally. Burst mode
operation, is accomplished by integrating input reg-
isters, internal 2-bit burst counter and high speed
SRAM in a single chip. Burst reads are initiated with
either ADSP or ADSC being LOW with a valid
address during the rising edge of clock. Data from
this address plus the three subsequent addresses
will be output. The chip is operated with a single
+3.3 V power supply and is compatible with LVTTL
I/O interfaces.
IBM043612PQK32K x 36Burst (Pentium), TQFP package.
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