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參數(shù)資料
| 型號： | HYB25D128400ATL-8 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 128 Mbit Double Data Rate SDRAM |
| 中文描述： | 128兆雙倍數(shù)據(jù)速率SDRAM |
| 文件頁數(shù)： | 21/79頁 |
| 文件大小： | 2596K |
| 代理商： | HYB25D128400ATL-8 |
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HYB25D128[400/800/160]A-[6/7/8]
128Mbit Double Data Rate SDRAM
Functional Description
Data Sheet
21
Rev. 1.06, 2004-01
09192003-LFQ1-R60G
3.5
Operations
3.5.1
Before any Read or Write commands can be issued to a bank within the DDR SDRAM, a row in that bank must
be “opened” (activated). This is accomplished via the Active command and addresses A0-A11, BA0 and BA1 (see
Activating a Specific Row in a Specific Bank), which decode and select both the bank and the row to be activated.
After opening a row (issuing an Active command), a Read or Write command may be issued to that row, subject
to the
t
RCD
specification. A subsequent Active command to a different row in the same bank can only be issued
after the previous active row has been “closed” (precharged). The minimum time interval between successive
Active commands to the same bank is defined by
t
RC
. A subsequent Active command to another bank can be
issued while the first bank is being accessed, which results in a reduction of total row-access overhead. The
minimum time interval between successive Active commands to different banks is defined by
t
RRD
.
Bank/Row Activation
Figure 6
Activating a Specific Row in a Specific Bank
Figure 7
t
RCD
and
t
RRD
Definition
RA
BA
HIGH
RA = row address.
BA = bank address.
CK
CK
CKE
CS
RAS
CAS
WE
A0-A11
BA0, BA1
Don’t Care
ROW
ACT
NOP
COL
ROW
BA y
BA y
BA x
ACT
NOP
NOP
CK
CK
Command
A0-A11
BA0, BA1
Don’t Care
RD/WR
t
RCD
t
RRD
NOP
NOP
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相關代理商/技術參數(shù) |
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| HYB25D128400C | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:128-Mbit Double-Data-Rate SDRAM |
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| HYB25D128400CE-6 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit Double Data Rate SDRAM |
| HYB25D128400CE-7 | 制造商:QIMONDA 制造商全稱:QIMONDA 功能描述:128-Mbit Double-Data-Rate SDRAM |
| HYB25D128400CT-7 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit Double Data Rate SDRAM |
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