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| 型號： | HT46C63(100QFP) |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 9/42頁 |
| 文件大?。?/td> | 362K |
| 代理商： | HT46C63(100QFP) |
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HT46R63/HT46C63
Rev. 1.00
9
September 9, 2002
4096 15bits,addressedbytheprogramcounterandta-
ble pointer.
Certain locations in the program memory are reserved
for special usage:
Location 000H
This area is reserved for program initialization. After
chip reset, the program always begins execution at lo-
cation 000H.
Location 004H
This area is reserved for the external interrupt 0 ser-
vice program. If the INT0 input pin is activated, the in-
terrupt is enabled and the stack is not full, the program
begins execution at this location.
Location 008H
This area is reserved for the external interrupt 1 ser-
vice program. If the INT1 input pin is activated, the in-
terrupt is enabled and the stack is not full, the program
begins execution at this location.
Location 00CH
This area is reserved for the timer/event counter inter-
rupt service program. If a timer interrupt results from a
timer/event counter overflow, and the interrupt is en-
abled and the stack is not full, the program begins ex-
ecution at location 00CH.
Location 010H
This area is reserved for the time base interrupt ser-
vice program. If the a time base time-out occurs, the
interrupt is enabled and the stack is not full, the pro-
gram begins execution at this location.
Location 014H
This area is reserved for the A/D converter interrupt
service program. If the interrupt is activated (when the
A/D conversion is completed), the interrupt is enabled
and the stack is not full, the program begins execution
at this location.
Location 018H
This area is reserved for the RTC interrupt service
program. When the RTC time-out occurs, the interrupt
isenabledandthestackisnotfull,theprogrambegins
execution at this location.
Table location
Any location in the program memory can be used as
look-up tables. The instructions TABRDC [m] (the
current page, 1 page=256 words) and TABRDL [m]
(the last page) transfer the contents of the lower-order
byte to the specified data memory, and the
higher-order byte to lower portion of TBLH(08H) and
the remaining bits (1 bits) of TBLH are read as 0 .
The table pointer (TBLP) is read/write register (07H),
which indicates the table location. Before accessing
the table, the location has to be placed in TBLP. The
TBLH is read only and cannot be restored. If the main
routineandtheISR(interruptserviceroutine)bothem-
ploy the table read instruction, the contents of TBLH in
the main routine are likely to be changed by the table
read instruction used in the ISR. Errors are thus
brought about. Given this, using the table read in-
struction in the main routine and the ISR simulta-
neously should be avoided. However, if the table read
instruction has to be applied in both main routine and
the ISR, the interrupt is supposed to be disabled prior
to the table read instruction. It will not be enabled until
the TBLH in the main routine has been backup. All ta-
ble related instructions require two cycles to complete
the operation. These areas may function as normal
program memory depending upon the requirements.
& # -
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Program memory
Instruction
Table Location
*11
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P11
P10
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Table location
Note: *11~*0: Table location bits
P11~P8: Current program counter bits
@7~@0: Table pointer bits
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