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| 型號： | HT46C63(100QFP) |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 22/42頁 |
| 文件大?。?/td> | 362K |
| 代理商： | HT46C63(100QFP) |
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HT46R63/HT46C63
Rev. 1.00
22
September 9, 2002
A/D converter
The 8 channels and 8-bit resolution (7-bit accuracy) A/D
converter are implemented in this microcontroller. The
reference voltage is VDD internally. The A/D converter
contains 3 special registers which are; ADR (21H),
ADCR (22H) and ACSR (23H). The ADR is A/D result
register. After the A/D conversion is completed, the ADR
should be read to get the conversion result data. The
ADCR is an A/D converter control register, which de-
fines the A/D channel number, analog channel select,
start A/D conversion control bit and the end of A/D con-
version flag. If the users want to start an A/D conversion,
after select the converted analog channel, and then give
START bit a positive pulse (0
conversion, the EOCB bit is cleared and an A/D con-
verter interrupt occurs(if the A/D converter interrupt is
enabled). The ACSR is an A/D clock setting register,
which is used to select the A/D clock source.
1
0). At the end of A/D
The A/D converter control register is used to control the
A/D converter. The bit2~bit0 of the ADCR are used to
select an analog input channel. There are a total of 8
channels to select. The bit5~bit3 of the ADCR are used
to set PB configurations. PB can be an analog input or
as digital I/O line decided by these 3 bits. Once a PB line
is selected as an analog input, the I/O functions and
pull-high resistor of this I/O line are disabled. The EOCB
bit (bit 6 of the ADCR) is end of A/D conversion flag.
Check this bit to know when A/D conversion is com-
pleted. The START bit of the ADCR is used to begin the
conversion of A/D converter. Give START bit a falling
edge that means the A/D conversion has started. The
A/D converter remains in reset state while the START
stays at
1
. In order to ensure the A/D conversion is
completed, the START should stay at
0
until the
EOCB is cleared to
0
(end of A/D conversion).
The bit 7 of the ACSR is used for testing purpose only. It
can not be used for the users. The bit1 and bit0 of the
ACSR are used to select A/D clock sources.
When the A/D conversion is completed, the A/D inter-
rupt request flag is set. The bit is set to 1 when the
START bit is set to 1 .
Register Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
ADR
D7
D6
D5
D4
D3
D2
D1
D0
ACSR register
Label
(ADCR)
Bits
Functions
ACS0
ACS1
ACS2
0
1
2
ACS2, ACS1, ACS0: A/D channel selection
0,0,0: AN0
0,0,1: AN1
0,1,0: AN2
0,1,1: AN3
1,0,0: AN4
1,0,1: AN5
1,1,0: AN6
1,1,1: AN7
PCR0
PCR1
PCR2
3
4
5
PCR2, PCR1, PCR0: PB7~PB0 pad functions
0,0,0: PB7, PB6, PB5, PB4, PB3, PB2, PB1, PB0
0,0,1: PB7, PB6, PB5, PB4, PB3, PB2, PB1, AN0
0,1,0: PB7, PB6, PB5, PB4, PB3, PB2, AN1, AN0
0,1,1: PB7, PB6, PB5, PB4, PB3, AN2, AN1, AN0
1,0,0: PB7, PB6, PB5, PB4, AN3, AN2, AN1, AN0
1,0,1: PB7, PB6, PB5, AN4, AN3, AN2, AN1, AN0
1,1,0: PB7, PB6, AN5, AN4, AN3, AN2, AN1, AN0
1,1,1: AN7, AN6, AN5, AN4, AN3, AN2, AN1, AN0
EOCB
6
End of A/D conversion flag
(0: end of A/D conversion)
START
7
A/D conversion sequence (START=010)
0: Initial value after chip RESET
0
1: Initial next A/D conversion.
1: reset A/D converter and set EOCB to 1
1
0: Starts the A/D conversion.
0: Normal state for A/D
Note:
It is recommended that START is 0 and PCR2~PCR0 is 000 before MCU entering HALT mode. HALT will
not standby the A/D converter automatically.
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