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參數(shù)資料
| 型號： | HPC |
| 文件頁數(shù)： | 25/30頁 |
| 文件大?。?/td> | 361K |
| 代理商： | HPC |
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Test Logic
(Continued)
The 16-bit FDBK register has been created to control input
stimulus through the HPC software. A binary pattern is load-
ed into the FDBK register and then shifted onto the HPC
inputs. Four of the inputs do not lend themselves to a simple
software solution for test. Therefore, the hardware has been
provided to access these pins through direct multiplexer
stimulation. An input test pin is shared by T2IN and T3IN.
Selection of the timer input is controlled by the MUXC regis-
ter bit TS2. The RDY and HOLD inputs share a test pin, as
well. The mode is controlled internally by a HOLDMODE bit.
CKIN and RSET are brought in through 2:1 MUXes.
The test logic hardware is part of the HPC macro and may
not be altered. When not in test mode, logic connected to
the user side of the isolating multiplexers will stimulate the
core and I/O pins. The USR0:USR8 inputs on the HPC mac-
ro are the user logic inputs for the 9 MUXes connected to
the output side of the HPC. The designer is responsible for
connecting the appropriate I/O macros to the required mac-
ro test pins.
HPC Core CPU
The HPC core CPU has a 16-bit ALU and six 16-bit regis-
ters:
Arithmetic Logic Unit (ALU)
The ALU is 16 bits wide and can do 16-bit add, subtract and
shift or logic AND, OR and exclusive OR in one timing cycle.
The ALU can also output the carry bit to a 1-bit C register.
Accumulator (A) Register
The 16-bit A register is the source and destination register
for most I/O, arithmetic, logic and data memory access op-
erations.
Address (B and X) Registers
The 16-bit B and X registers can be used for indirect ad-
dressing. They can automatically count up or down to se-
quence through data memory.
Boundary (K) Register
The 16-bit register is used to set limits in repetitive loops of
code as register B sequences through data memory.
Stack Pointer (SP) Register
The 16-bit SP register is the pointer that addresses the
stack. The SP register is incremented by two for each push
or call and decremented by two for each pop or return. The
stack can be placed anywhere in user memory and be as
deep as the available memory permits.
Program (PC) Register
The 16-bit PC register addresses program memory.
Addressing Modes
Addressing ModesDAccumulator as Destination
Register Indirect
This is the ‘‘normal’’ mode of addressing for the HPC core
(instructions are single byte). The operand is the memory
addressed by the B register (or X register for some instruc-
tions).
Direct
The instruction contains an 8-bit or 16-bit address field that
directly points to the memory for the operand.
Indirect
The instruction contains an 8-bit address field. The contents
of the WORD addressed points to the memory for the oper-
and.
Indexed
The instruction contains an 8-bit address field and an 8- or
16-bit displacement field. The contents of the WORD ad-
dressed is added to the displacement to get the address of
the operand.
Immediate
The instruction contains an 8-bit or 16-bit immediate field
that is used as the operand.
Register Indirect (Auto Increment and Decrement)
The operand is the memory addressed by the X register.
This mode automatically increments or decrements the X
register (by 1 for bytes and by 2 for words).
Register Indirect (Auto Increment and Decrement)
with Conditional Skip
The operand is the memory addressed by the B register.
This mode automatically increments or decrements the B
register (by 1 for bytes and by 2 for words). The B register is
then compared with the K register. A skip condition is gener-
ated if B goes past K.
Addressing ModesDDirect Memory as Destination
Direct Memory to Direct Memory
The instruction contains two 8- or 16-bit address fields. One
field directly points to the source operand and the other field
directly points to the destination operand.
Immediate to Direct Memory
The instruction contains an 8- of 16-bit address field and an
8- or 16-bit immediate field. The immediate field is the oper-
and and the direct field is the destination.
Double Register Indirect Using the B and X Registers
Used only with Reset, Set and IF bit instructions; a specific
bit within the 64 kbyte address range is addressed using the
B and X registers. The address of a byte of memory is
formed by adding the contents of the B register to the most
significant 13 bits of the X register. The specific bit to be
modified or tested within the byte of memory is selected
using the least significant 3 bits of register X.
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