參數(shù)資料
型號: HD66787
廠商: Renesas Technology Corp.
英文描述: 528-channel, One-chip Driver with 262,144-color Display RAM and Power Supply Circuit for Low-temperature Poli-Si TFT (LTPS-TFT) Panels with Incorporat
中文描述: 528與262,144色顯示RAM和低電源電路通道,單芯片驅(qū)動器的溫度和旋鈴聲非晶硅TFT(薄膜晶體管)與Incorporat小組
文件頁數(shù): 9/159頁
文件大?。?/td> 1607K
代理商: HD66787
HD66787
Preliminary
Rev.0.22, May.23.2003, page 9 of 159
Signals
Number
of Pins
I/O
Connected
to
Functions
RS
1
I
MPU
Select register.
Low: Index/status, High: Control
Fix to the “IOVcc” or “GND” level while using SPI.
WR*/SCL
1
I
MPU
In 80-system bus interface mode, serves as a write strobe
signal. Data are written at “Low” level.
In Serial Peripheral Interface mode, serves as synchronizing
clock signal.
RD*
1
I
MPU
In 80-system bus interface mode, serves as read-strobe signal.
Data are read at the low level of the signal.
Fix to the “IOVcc” or “GND” level while using SPI.
DB0/SDI
1
I/O
MPU
18-bit parallel bi-directional data bus.
8-bit bus: DB17-DB10
9-bit bus: DB17-DB9
16-bit bus: DB17-DB10 and DB8-DB1
18-bit bus: DB17-DB0
Unused pins must be fixed to the IOVcc or GND level.
Serves as serial data input pin (SDI) in Serial Peripheral
Interface mode, where data are input on the rising edge of SCL
signal.
DB1/SDO
1
I/O
MPU
18-bit parallel bi-directional data bus.
8-bit bus: DB17-DB10
9-bit bus: DB17-DB9
16-bit bus: DB17-DB10 and DB8-DB1
18-bit bus: DB17-DB0
Unused pins must be fixed to the IOVcc or GND level.
Serves as serial data output pin (SDO) in Serial Peripheral
Interface mode, where data are output on the falling edge of
the SCL signal.
DB2~DB17
16
I/O
MPU
18-bit parallel bi-directional data bus.
8-bit bus: DB17-DB10
9-bit bus: DB17-DB9
16-bit bus: DB17-DB10 and DB8-DB1
18-bit bus: DB17-DB0
Unused pins must be fixed to the IOVcc or GND level.
Indicate whether RAM data are valid or not when RGB
interface is used.
Low: Selected (access enabled)
High: Not selected (access disabled)
Must be fixed to the IOVcc or GND level while not used.
ENABLE signal invert the polarity according to the setting of
EPL resister.
ENABLE
1
I
MPU
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