
HD66787
Preliminary
Rev.0.22, May.23.2003, page 2 of 159
Driver Output Control (R01h)................................................................................................31
LCD Driving Waveform Control (R02h)...............................................................................33
Entry Mode (R03h) Compare Register 1 (R04h) Compare Register 2 (R05h).....................34
Display Control 1 (R07h).......................................................................................................36
Display Control 2 (R08h).......................................................................................................38
Frame Cycle Control (R0Bh).................................................................................................40
External Display Interface Control (R0Ch) ...........................................................................43
LTPS Interface Control (R0Dh).............................................................................................47
Power Control 1 (R10h) Power Control 2 (R11h).................................................................51
Power Control 3 (R12h) Power Control 4 (R13h).................................................................54
RAM Address Set (R21h)......................................................................................................56
Write Data to GRAM (R22h).................................................................................................57
RAM Access through RGB-I/F and System I/F.....................................................................62
Read Data Read from GRAM (R22h)....................................................................................63
RAM Write Data Mask (R23h) RAM Write Data Mask (R24h)...........................................66
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Control (R30h to R39h).......................................................................................................67
Vertical Scroll Control (R41h)...............................................................................................68
1st-Screen Drive Position (R42h) 2nd-Screen Drive Position (R43h)...................................68
Horizontal RAM Address Position (R44h) Vertical RAM Address Position (R45h)............69
Instruction List.................................................................................................... 70
Reset Function .................................................................................................... 71
Interface Specifications....................................................................................... 73
System Interface.................................................................................................. 75
80-system 18-bit interface......................................................................................................76
80-system 16-bit interface......................................................................................................77
80-system 9-bit interface........................................................................................................78
Data transmission synchronizing in 9-bit bus interface mode................................................79
80-system 8-bit interface........................................................................................................79
Data transmission synchronization in 8-bit bus interface mode.............................................81
Serial Peripheral interface (SPI) ............................................................................................82
VSYNC Interface................................................................................................ 85
Conditions on using VSYNC interface..................................................................................87
External Display Interface .................................................................................. 89
RGB interface........................................................................................................................89
VLD and ENABLE signals....................................................................................................90
RGB interface timing.............................................................................................................90
Moving picture display..........................................................................................................92
RAM access through system interface in RGB-I/F mode......................................................92
6-bit RGB interface................................................................................................................93
Data transmission synchronization in 6-bit RGB interface mode..........................................93
16-bit RGB interface..............................................................................................................94
18-bit RGB interface..............................................................................................................95