Contents
Section 1
1.1
1.2
1.3
Overview
......................................................................................................
Overview.........................................................................................................................
Block Diagram................................................................................................................
Pin Description ...............................................................................................................
1.3.1
Pin Arrangement.............................................................................................
1.3.2
Pin Assignments in Each Mode......................................................................
1.3.3
Pin Functions.................................................................................................. 10
1
1
5
6
6
7
Section 2
2.1
CPU
............................................................................................................... 15
Overview......................................................................................................................... 15
2.1.1
Features........................................................................................................... 15
2.1.2
Differences from H8/300 CPU....................................................................... 16
CPU Operating Modes.................................................................................................... 17
Address Space................................................................................................................. 18
Register Configuration.................................................................................................... 19
2.4.1
Overview......................................................................................................... 19
2.4.2
General Registers............................................................................................ 20
2.4.3
Control Registers............................................................................................ 21
2.4.4
Initial CPU Register Values............................................................................ 22
Data Formats................................................................................................................... 23
2.5.1
General Register Data Formats....................................................................... 23
2.5.2
Memory Data Formats.................................................................................... 25
Instruction Set................................................................................................................. 26
2.6.1
Instruction Set Overview................................................................................ 26
2.6.2
Instructions and Addressing Modes................................................................ 27
2.6.3
Tables of Instructions Classified by Function................................................. 28
2.6.4
Basic Instruction Formats............................................................................... 38
2.6.5
Notes on Use of Bit Manipulation Instructions.............................................. 39
Addressing Modes and Effective Address Calculation .................................................. 39
2.7.1
Addressing Modes.......................................................................................... 39
2.7.2
Effective Address Calculation ........................................................................ 42
Processing States ............................................................................................................ 46
2.8.1
Overview......................................................................................................... 46
2.8.2
Program Execution State ................................................................................ 47
2.8.3
Exception-Handling State............................................................................... 47
2.8.4
Exception-Handling Sequences...................................................................... 49
2.8.5
Bus-Released State ......................................................................................... 50
2.8.6
Reset State ...................................................................................................... 50
2.8.7
Power-Down State.......................................................................................... 50
2.2
2.3
2.4
2.5
2.6
2.7
2.8